llvm-6502/test/MC
Tilmann Scheller a744d41a3f ARM: Fix pseudo-instructions for SRS (Store Return State).
The mapping between SRS pseudo-instructions and SRS native instructions was incorrect, the correct mapping is:

srsfa -> srsib
srsea -> srsia
srsfd -> srsdb
srsed -> srsda

This fixes <rdar://problem/14214734>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185155 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 15:09:46 +00:00
..
AArch64 AArch64: fix overzealous NEXTing for Windows testing. 2013-06-23 15:32:01 +00:00
ARM ARM: Fix pseudo-instructions for SRS (Store Return State). 2013-06-28 15:09:46 +00:00
AsmParser
COFF
Disassembler [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg 2013-06-26 22:23:32 +00:00
ELF Integrate Assembler: Support X86_64_DTPOFF64 relocations 2013-06-28 04:24:32 +00:00
MachO
Markup
MBlaze
Mips [mips] Do not emit ".option pic0" if target is mips64. 2013-06-26 19:08:49 +00:00
PowerPC [PowerPC] Accept 17-bit signed immediates for addis 2013-06-26 13:49:53 +00:00
SystemZ [SystemZ] Immediate compare-and-branch support 2013-05-29 11:58:52 +00:00
X86 Add support for encoding the HLE XACQUIRE and XRELEASE prefixes. 2013-06-18 17:08:10 +00:00