Jack Carter af7da5cb99 [Mips Assembler] Add support for OR macro with imediate opperand ... Mips assembler supports macros that allows the OR instruction to have an immediate parameter. This patch adds an instruction alias that converts this macro into a Mips ORI instruction. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178316 91177308-0d34-0410-b5e6-96231b3b80d8		2013-03-28 23:45:13 +00:00
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AArch64	AArch64: implement GICv3 system registers	2013-03-28 14:30:46 +00:00
ARM	Fix pr13145 - Naming a function like a register name confuses the asm parser.	2013-03-19 23:44:03 +00:00
AsmParser	AsmParser: More generic support for integer type suffices.	2013-02-26 20:17:10 +00:00
COFF	[MC][COFF] Delay handling symbol aliases when writing	2013-01-29 22:10:07 +00:00
Disassembler	Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when the upper bit is set.	2013-03-28 19:22:28 +00:00
ELF	Move test since it depends on the X86 backend.	2013-03-28 17:01:28 +00:00
MachO	Revert r15266. This fixes llvm.org/pr15266.	2013-02-14 16:23:08 +00:00
Markup
MBlaze
Mips	[Mips Assembler] Add support for OR macro with imediate opperand	2013-03-28 23:45:13 +00:00
PowerPC
X86	Add support of RDSEED defined in AVX2 extension	2013-03-28 23:41:26 +00:00