Devang Patel 2e35047947 Add dominance check for the instruction being hoisted. ... For example, MachineLICM should not hoist a load that is not guaranteed to be executed. Radar 10254254. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141689 91177308-0d34-0410-b5e6-96231b3b80d8		2011-10-11 18:09:58 +00:00
..
Analysis	Move replaceCongruentIVs into SCEVExapander and bias toward "expanded"	2011-10-11 02:28:51 +00:00
Archive
AsmParser
Bitcode
CodeGen	Add dominance check for the instruction being hoisted.	2011-10-11 18:09:58 +00:00
DebugInfo	lib/DebugInfo/DWARFDebugLine.cpp: De-Unicode-ify.	2011-10-08 11:22:47 +00:00
ExecutionEngine
Linker	Make it possible to use the linker without destroying the source module. This is so the source module can be linked to multiple other destination modules. For all that used LinkModules() before, they will continue to destroy the source module as before.	2011-10-11 00:24:54 +00:00
MC	Also create a shndx even if there are no symbols. This lets us test	2011-10-11 03:54:50 +00:00
Object	Expose MachOObjectFile externally, like we do for COFF. First step in reducing the amount of special-purpose code needed for llvm-objdump.	2011-10-11 17:32:27 +00:00
Support	The Mips specific function for instruction cache invalidation cannot be	2011-10-10 18:41:02 +00:00
TableGen	Revert r141079: tblgen: add preprocessor as a separate mode	2011-10-08 12:39:26 +00:00
Target	ARM parse alignment specifier for NEON load/store instructions.	2011-10-11 17:29:55 +00:00
Transforms	Remove a lot of the fancy scalar replacement code for dealing with llvm-gcc's	2011-10-11 06:10:30 +00:00
VMCore	Move default to top of switch	2011-10-07 16:27:01 +00:00
CMakeLists.txt
Makefile