Peter Collingbourne 948cf0289f Recognise 32-bit ror-based bswap implementation used by uclibc ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119007 91177308-0d34-0410-b5e6-96231b3b80d8		2010-11-13 19:54:30 +00:00
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Alpha
ARM	Add conditional move of large immediate.	2010-11-13 02:25:14 +00:00
Blackfin
CBackend
CellSPU	Fix memory access lowering on SPU, adding	2010-11-12 10:14:03 +00:00
CPP
Generic	Emacs auto-fill bug.	2010-11-12 18:17:46 +00:00
MBlaze	Recommit 116986 with capitalization typo fixed.	2010-10-21 03:57:26 +00:00
Mips	Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com>	2010-11-12 00:38:32 +00:00
MSP430	Inline asm mult-alt constraint tests.	2010-11-02 23:01:44 +00:00
PowerPC	Inline asm mult-alt constraint tests.	2010-11-02 23:01:44 +00:00
PTX	Add test case mov.ll for PTX device function	2010-10-19 13:21:51 +00:00
SPARC	Inline asm mult-alt constraint tests.	2010-11-02 23:01:44 +00:00
SystemZ
Thumb	Do not use MEMBARRIER_MCR for any Thumb code.	2010-11-09 22:50:44 +00:00
Thumb2	Two sets of changes. Sorry they are intermingled.	2010-11-03 00:45:17 +00:00
X86	Recognise 32-bit ror-based bswap implementation used by uclibc	2010-11-13 19:54:30 +00:00
XCore
thumb2-mul.ll	Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes	2010-09-21 22:51:46 +00:00