Jack Carter 2f68b311a1 Initial assembler implementation of Mips load address macro ... This patch provides initial implementation of load address macro instruction for Mips. We have implemented two kinds of expansions with their variations depending on the size of immediate operand: 1) load address with immediate value directly: * la d,j => addiu d,$zero,j (for -32768 <= j <= 65535) * la d,j => lui d,hi16(j) ori d,d,lo16(j) (for any other 32 bit value of j) 2) load load address with register offset value * la d,j(s) => addiu d,s,j (for -32768 <= j <= 65535) * la d,j(s) => lui d,hi16(j) (for any other 32 bit value of j) ori d,d,lo16(j) addu d,d,s This patch does not cover the case when the address is loaded from the value of the label or function. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165561 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-09 23:29:45 +00:00
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ARM	ARM: 'add Rd, pc, #imm' is an alias for 'adr Rd, #imm'.	2012-09-25 00:08:13 +00:00
AsmParser	Add support for macro parameters/arguments delimited by spaces,	2012-09-19 20:36:12 +00:00
COFF	Emit dtors into proper section while compiling in vcpp-compatible mode.	2012-09-23 15:53:47 +00:00
Disassembler	Diagnose invalid alignments on duplicating VLDn instructions.	2012-09-06 15:27:12 +00:00
ELF	MC: Overhaul handling of .lcomm	2012-09-07 17:25:13 +00:00
MachO	MachO: direct-to-object attribute for data-in-code markers.	2012-10-01 22:20:54 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	Initial assembler implementation of Mips load address macro	2012-10-09 23:29:45 +00:00
X86	llvm/test/MC/X86/x86_nop.s: Make sure -arch=x86 when -mcpu=geode.	2012-09-19 00:56:20 +00:00