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dff84b0325
pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120635 91177308-0d34-0410-b5e6-96231b3b80d8
1251 lines
46 KiB
C++
1251 lines
46 KiB
C++
//===- lib/MC/MachObjectWriter.cpp - Mach-O File Writer -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/StringMap.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MCMachOSymbolFlags.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Object/MachOFormat.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetAsmBackend.h"
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// FIXME: Gross.
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#include "../Target/X86/X86FixupKinds.h"
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#include <vector>
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using namespace llvm;
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using namespace llvm::object;
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// FIXME: this has been copied from (or to) X86AsmBackend.cpp
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static unsigned getFixupKindLog2Size(unsigned Kind) {
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switch (Kind) {
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// FIXME: Until ARM has it's own relocation stuff spun off, it comes
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// through here and we don't want it to puke all over. Any reasonable
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// values will only come when ARM relocation support gets added, at which
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// point this will be X86 only again and the llvm_unreachable can be
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// re-enabled.
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default: return 0;// llvm_unreachable("invalid fixup kind!");
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case FK_PCRel_1:
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case FK_Data_1: return 0;
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case FK_PCRel_2:
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case FK_Data_2: return 1;
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case FK_PCRel_4:
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case X86::reloc_riprel_4byte:
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case X86::reloc_riprel_4byte_movq_load:
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case X86::reloc_signed_4byte:
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case FK_Data_4: return 2;
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case FK_Data_8: return 3;
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}
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}
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static bool isFixupKindPCRel(unsigned Kind) {
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switch (Kind) {
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default:
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return false;
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case FK_PCRel_1:
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case FK_PCRel_2:
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case FK_PCRel_4:
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case X86::reloc_riprel_4byte:
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case X86::reloc_riprel_4byte_movq_load:
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return true;
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}
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}
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static bool isFixupKindRIPRel(unsigned Kind) {
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return Kind == X86::reloc_riprel_4byte ||
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Kind == X86::reloc_riprel_4byte_movq_load;
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}
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static bool doesSymbolRequireExternRelocation(MCSymbolData *SD) {
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// Undefined symbols are always extern.
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if (SD->Symbol->isUndefined())
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return true;
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// References to weak definitions require external relocation entries; the
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// definition may not always be the one in the same object file.
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if (SD->getFlags() & SF_WeakDefinition)
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return true;
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// Otherwise, we can use an internal relocation.
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return false;
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}
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static bool isScatteredFixupFullyResolved(const MCAssembler &Asm,
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const MCValue Target,
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const MCSymbolData *BaseSymbol) {
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// The effective fixup address is
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// addr(atom(A)) + offset(A)
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// - addr(atom(B)) - offset(B)
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// - addr(BaseSymbol) + <fixup offset from base symbol>
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// and the offsets are not relocatable, so the fixup is fully resolved when
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// addr(atom(A)) - addr(atom(B)) - addr(BaseSymbol) == 0.
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//
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// Note that "false" is almost always conservatively correct (it means we emit
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// a relocation which is unnecessary), except when it would force us to emit a
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// relocation which the target cannot encode.
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const MCSymbolData *A_Base = 0, *B_Base = 0;
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if (const MCSymbolRefExpr *A = Target.getSymA()) {
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// Modified symbol references cannot be resolved.
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if (A->getKind() != MCSymbolRefExpr::VK_None)
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return false;
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A_Base = Asm.getAtom(&Asm.getSymbolData(A->getSymbol()));
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if (!A_Base)
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return false;
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}
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if (const MCSymbolRefExpr *B = Target.getSymB()) {
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// Modified symbol references cannot be resolved.
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if (B->getKind() != MCSymbolRefExpr::VK_None)
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return false;
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B_Base = Asm.getAtom(&Asm.getSymbolData(B->getSymbol()));
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if (!B_Base)
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return false;
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}
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// If there is no base, A and B have to be the same atom for this fixup to be
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// fully resolved.
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if (!BaseSymbol)
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return A_Base == B_Base;
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// Otherwise, B must be missing and A must be the base.
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return !B_Base && BaseSymbol == A_Base;
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}
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static bool isScatteredFixupFullyResolvedSimple(const MCAssembler &Asm,
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const MCValue Target,
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const MCSection *BaseSection) {
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// The effective fixup address is
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// addr(atom(A)) + offset(A)
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// - addr(atom(B)) - offset(B)
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// - addr(<base symbol>) + <fixup offset from base symbol>
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// and the offsets are not relocatable, so the fixup is fully resolved when
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// addr(atom(A)) - addr(atom(B)) - addr(<base symbol>)) == 0.
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//
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// The simple (Darwin, except on x86_64) way of dealing with this was to
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// assume that any reference to a temporary symbol *must* be a temporary
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// symbol in the same atom, unless the sections differ. Therefore, any PCrel
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// relocation to a temporary symbol (in the same section) is fully
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// resolved. This also works in conjunction with absolutized .set, which
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// requires the compiler to use .set to absolutize the differences between
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// symbols which the compiler knows to be assembly time constants, so we don't
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// need to worry about considering symbol differences fully resolved.
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// Non-relative fixups are only resolved if constant.
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if (!BaseSection)
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return Target.isAbsolute();
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// Otherwise, relative fixups are only resolved if not a difference and the
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// target is a temporary in the same section.
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if (Target.isAbsolute() || Target.getSymB())
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return false;
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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if (!A->isTemporary() || !A->isInSection() ||
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&A->getSection() != BaseSection)
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return false;
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return true;
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}
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namespace {
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class MachObjectWriter : public MCObjectWriter {
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/// MachSymbolData - Helper struct for containing some precomputed information
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/// on symbols.
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struct MachSymbolData {
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MCSymbolData *SymbolData;
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uint64_t StringIndex;
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uint8_t SectionIndex;
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// Support lexicographic sorting.
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bool operator<(const MachSymbolData &RHS) const {
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return SymbolData->getSymbol().getName() <
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RHS.SymbolData->getSymbol().getName();
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}
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};
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/// @name Relocation Data
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/// @{
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llvm::DenseMap<const MCSectionData*,
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std::vector<macho::RelocationEntry> > Relocations;
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llvm::DenseMap<const MCSectionData*, unsigned> IndirectSymBase;
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/// @}
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/// @name Symbol Table Data
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/// @{
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SmallString<256> StringTable;
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std::vector<MachSymbolData> LocalSymbolData;
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std::vector<MachSymbolData> ExternalSymbolData;
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std::vector<MachSymbolData> UndefinedSymbolData;
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/// @}
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unsigned Is64Bit : 1;
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uint32_t CPUType;
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uint32_t CPUSubtype;
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public:
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MachObjectWriter(raw_ostream &_OS,
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bool _Is64Bit, uint32_t _CPUType, uint32_t _CPUSubtype,
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bool _IsLittleEndian)
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: MCObjectWriter(_OS, _IsLittleEndian),
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Is64Bit(_Is64Bit), CPUType(_CPUType), CPUSubtype(_CPUSubtype) {
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}
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void WriteHeader(unsigned NumLoadCommands, unsigned LoadCommandsSize,
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bool SubsectionsViaSymbols) {
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uint32_t Flags = 0;
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if (SubsectionsViaSymbols)
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Flags |= macho::HF_SubsectionsViaSymbols;
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// struct mach_header (28 bytes) or
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// struct mach_header_64 (32 bytes)
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uint64_t Start = OS.tell();
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(void) Start;
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Write32(Is64Bit ? macho::HM_Object64 : macho::HM_Object32);
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Write32(CPUType);
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Write32(CPUSubtype);
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Write32(macho::HFT_Object);
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Write32(NumLoadCommands);
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Write32(LoadCommandsSize);
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Write32(Flags);
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if (Is64Bit)
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Write32(0); // reserved
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assert(OS.tell() - Start == Is64Bit ?
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macho::Header64Size : macho::Header32Size);
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}
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/// WriteSegmentLoadCommand - Write a segment load command.
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///
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/// \arg NumSections - The number of sections in this segment.
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/// \arg SectionDataSize - The total size of the sections.
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void WriteSegmentLoadCommand(unsigned NumSections,
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uint64_t VMSize,
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uint64_t SectionDataStartOffset,
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uint64_t SectionDataSize) {
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// struct segment_command (56 bytes) or
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// struct segment_command_64 (72 bytes)
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uint64_t Start = OS.tell();
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(void) Start;
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unsigned SegmentLoadCommandSize = Is64Bit ? macho::SegmentLoadCommand64Size:
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macho::SegmentLoadCommand32Size;
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Write32(Is64Bit ? macho::LCT_Segment64 : macho::LCT_Segment);
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Write32(SegmentLoadCommandSize +
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NumSections * (Is64Bit ? macho::Section64Size :
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macho::Section32Size));
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WriteBytes("", 16);
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if (Is64Bit) {
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Write64(0); // vmaddr
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Write64(VMSize); // vmsize
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Write64(SectionDataStartOffset); // file offset
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Write64(SectionDataSize); // file size
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} else {
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Write32(0); // vmaddr
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Write32(VMSize); // vmsize
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Write32(SectionDataStartOffset); // file offset
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Write32(SectionDataSize); // file size
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}
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Write32(0x7); // maxprot
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Write32(0x7); // initprot
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Write32(NumSections);
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Write32(0); // flags
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assert(OS.tell() - Start == SegmentLoadCommandSize);
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}
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void WriteSection(const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCSectionData &SD, uint64_t FileOffset,
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uint64_t RelocationsStart, unsigned NumRelocations) {
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uint64_t SectionSize = Layout.getSectionSize(&SD);
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// The offset is unused for virtual sections.
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if (SD.getSection().isVirtualSection()) {
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assert(Layout.getSectionFileSize(&SD) == 0 && "Invalid file size!");
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FileOffset = 0;
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}
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// struct section (68 bytes) or
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// struct section_64 (80 bytes)
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uint64_t Start = OS.tell();
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(void) Start;
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const MCSectionMachO &Section = cast<MCSectionMachO>(SD.getSection());
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WriteBytes(Section.getSectionName(), 16);
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WriteBytes(Section.getSegmentName(), 16);
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if (Is64Bit) {
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Write64(Layout.getSectionAddress(&SD)); // address
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Write64(SectionSize); // size
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} else {
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Write32(Layout.getSectionAddress(&SD)); // address
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Write32(SectionSize); // size
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}
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Write32(FileOffset);
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unsigned Flags = Section.getTypeAndAttributes();
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if (SD.hasInstructions())
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Flags |= MCSectionMachO::S_ATTR_SOME_INSTRUCTIONS;
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assert(isPowerOf2_32(SD.getAlignment()) && "Invalid alignment!");
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Write32(Log2_32(SD.getAlignment()));
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Write32(NumRelocations ? RelocationsStart : 0);
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Write32(NumRelocations);
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Write32(Flags);
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Write32(IndirectSymBase.lookup(&SD)); // reserved1
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Write32(Section.getStubSize()); // reserved2
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if (Is64Bit)
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Write32(0); // reserved3
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assert(OS.tell() - Start == Is64Bit ? macho::Section64Size :
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macho::Section32Size);
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}
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void WriteSymtabLoadCommand(uint32_t SymbolOffset, uint32_t NumSymbols,
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uint32_t StringTableOffset,
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uint32_t StringTableSize) {
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// struct symtab_command (24 bytes)
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uint64_t Start = OS.tell();
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(void) Start;
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Write32(macho::LCT_Symtab);
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Write32(macho::SymtabLoadCommandSize);
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Write32(SymbolOffset);
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Write32(NumSymbols);
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Write32(StringTableOffset);
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Write32(StringTableSize);
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assert(OS.tell() - Start == macho::SymtabLoadCommandSize);
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}
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void WriteDysymtabLoadCommand(uint32_t FirstLocalSymbol,
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uint32_t NumLocalSymbols,
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uint32_t FirstExternalSymbol,
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uint32_t NumExternalSymbols,
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uint32_t FirstUndefinedSymbol,
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uint32_t NumUndefinedSymbols,
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uint32_t IndirectSymbolOffset,
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uint32_t NumIndirectSymbols) {
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// struct dysymtab_command (80 bytes)
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uint64_t Start = OS.tell();
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(void) Start;
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Write32(macho::LCT_Dysymtab);
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Write32(macho::DysymtabLoadCommandSize);
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Write32(FirstLocalSymbol);
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Write32(NumLocalSymbols);
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Write32(FirstExternalSymbol);
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Write32(NumExternalSymbols);
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Write32(FirstUndefinedSymbol);
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Write32(NumUndefinedSymbols);
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Write32(0); // tocoff
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Write32(0); // ntoc
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Write32(0); // modtaboff
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Write32(0); // nmodtab
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Write32(0); // extrefsymoff
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Write32(0); // nextrefsyms
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Write32(IndirectSymbolOffset);
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Write32(NumIndirectSymbols);
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Write32(0); // extreloff
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Write32(0); // nextrel
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Write32(0); // locreloff
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Write32(0); // nlocrel
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assert(OS.tell() - Start == macho::DysymtabLoadCommandSize);
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}
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void WriteNlist(MachSymbolData &MSD, const MCAsmLayout &Layout) {
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MCSymbolData &Data = *MSD.SymbolData;
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const MCSymbol &Symbol = Data.getSymbol();
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uint8_t Type = 0;
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uint16_t Flags = Data.getFlags();
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uint32_t Address = 0;
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// Set the N_TYPE bits. See <mach-o/nlist.h>.
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//
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// FIXME: Are the prebound or indirect fields possible here?
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if (Symbol.isUndefined())
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Type = macho::STT_Undefined;
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else if (Symbol.isAbsolute())
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Type = macho::STT_Absolute;
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else
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Type = macho::STT_Section;
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// FIXME: Set STAB bits.
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if (Data.isPrivateExtern())
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Type |= macho::STF_PrivateExtern;
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// Set external bit.
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if (Data.isExternal() || Symbol.isUndefined())
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Type |= macho::STF_External;
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// Compute the symbol address.
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if (Symbol.isDefined()) {
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if (Symbol.isAbsolute()) {
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Address = cast<MCConstantExpr>(Symbol.getVariableValue())->getValue();
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} else {
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Address = Layout.getSymbolAddress(&Data);
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}
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} else if (Data.isCommon()) {
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// Common symbols are encoded with the size in the address
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// field, and their alignment in the flags.
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Address = Data.getCommonSize();
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// Common alignment is packed into the 'desc' bits.
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if (unsigned Align = Data.getCommonAlignment()) {
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unsigned Log2Size = Log2_32(Align);
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assert((1U << Log2Size) == Align && "Invalid 'common' alignment!");
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if (Log2Size > 15)
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report_fatal_error("invalid 'common' alignment '" +
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Twine(Align) + "'");
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// FIXME: Keep this mask with the SymbolFlags enumeration.
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Flags = (Flags & 0xF0FF) | (Log2Size << 8);
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}
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}
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// struct nlist (12 bytes)
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Write32(MSD.StringIndex);
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Write8(Type);
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Write8(MSD.SectionIndex);
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// The Mach-O streamer uses the lowest 16-bits of the flags for the 'desc'
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// value.
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Write16(Flags);
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if (Is64Bit)
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Write64(Address);
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else
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Write32(Address);
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}
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// FIXME: We really need to improve the relocation validation. Basically, we
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// want to implement a separate computation which evaluates the relocation
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// entry as the linker would, and verifies that the resultant fixup value is
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// exactly what the encoder wanted. This will catch several classes of
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// problems:
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//
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// - Relocation entry bugs, the two algorithms are unlikely to have the same
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// exact bug.
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//
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// - Relaxation issues, where we forget to relax something.
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//
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// - Input errors, where something cannot be correctly encoded. 'as' allows
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// these through in many cases.
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void RecordX86_64Relocation(const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue) {
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unsigned IsPCRel = isFixupKindPCRel(Fixup.getKind());
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unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind());
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unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
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// See <reloc.h>.
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uint32_t FixupOffset =
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Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
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uint32_t FixupAddress =
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Layout.getFragmentAddress(Fragment) + Fixup.getOffset();
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int64_t Value = 0;
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unsigned Index = 0;
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unsigned IsExtern = 0;
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unsigned Type = 0;
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Value = Target.getConstant();
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if (IsPCRel) {
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// Compensate for the relocation offset, Darwin x86_64 relocations only
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// have the addend and appear to have attempted to define it to be the
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// actual expression addend without the PCrel bias. However, instructions
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// with data following the relocation are not accomodated for (see comment
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// below regarding SIGNED{1,2,4}), so it isn't exactly that either.
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Value += 1LL << Log2Size;
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}
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if (Target.isAbsolute()) { // constant
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// SymbolNum of 0 indicates the absolute section.
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Type = macho::RIT_X86_64_Unsigned;
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Index = 0;
|
|
|
|
// FIXME: I believe this is broken, I don't think the linker can
|
|
// understand it. I think it would require a local relocation, but I'm not
|
|
// sure if that would work either. The official way to get an absolute
|
|
// PCrel relocation is to use an absolute symbol (which we don't support
|
|
// yet).
|
|
if (IsPCRel) {
|
|
IsExtern = 1;
|
|
Type = macho::RIT_X86_64_Branch;
|
|
}
|
|
} else if (Target.getSymB()) { // A - B + constant
|
|
const MCSymbol *A = &Target.getSymA()->getSymbol();
|
|
MCSymbolData &A_SD = Asm.getSymbolData(*A);
|
|
const MCSymbolData *A_Base = Asm.getAtom(&A_SD);
|
|
|
|
const MCSymbol *B = &Target.getSymB()->getSymbol();
|
|
MCSymbolData &B_SD = Asm.getSymbolData(*B);
|
|
const MCSymbolData *B_Base = Asm.getAtom(&B_SD);
|
|
|
|
// Neither symbol can be modified.
|
|
if (Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None ||
|
|
Target.getSymB()->getKind() != MCSymbolRefExpr::VK_None)
|
|
report_fatal_error("unsupported relocation of modified symbol");
|
|
|
|
// We don't support PCrel relocations of differences. Darwin 'as' doesn't
|
|
// implement most of these correctly.
|
|
if (IsPCRel)
|
|
report_fatal_error("unsupported pc-relative relocation of difference");
|
|
|
|
// The support for the situation where one or both of the symbols would
|
|
// require a local relocation is handled just like if the symbols were
|
|
// external. This is certainly used in the case of debug sections where
|
|
// the section has only temporary symbols and thus the symbols don't have
|
|
// base symbols. This is encoded using the section ordinal and
|
|
// non-extern relocation entries.
|
|
|
|
// Darwin 'as' doesn't emit correct relocations for this (it ends up with
|
|
// a single SIGNED relocation); reject it for now. Except the case where
|
|
// both symbols don't have a base, equal but both NULL.
|
|
if (A_Base == B_Base && A_Base)
|
|
report_fatal_error("unsupported relocation with identical base");
|
|
|
|
Value += Layout.getSymbolAddress(&A_SD) -
|
|
(A_Base == NULL ? 0 : Layout.getSymbolAddress(A_Base));
|
|
Value -= Layout.getSymbolAddress(&B_SD) -
|
|
(B_Base == NULL ? 0 : Layout.getSymbolAddress(B_Base));
|
|
|
|
if (A_Base) {
|
|
Index = A_Base->getIndex();
|
|
IsExtern = 1;
|
|
}
|
|
else {
|
|
Index = A_SD.getFragment()->getParent()->getOrdinal() + 1;
|
|
IsExtern = 0;
|
|
}
|
|
Type = macho::RIT_X86_64_Unsigned;
|
|
|
|
macho::RelocationEntry MRE;
|
|
MRE.Word0 = FixupOffset;
|
|
MRE.Word1 = ((Index << 0) |
|
|
(IsPCRel << 24) |
|
|
(Log2Size << 25) |
|
|
(IsExtern << 27) |
|
|
(Type << 28));
|
|
Relocations[Fragment->getParent()].push_back(MRE);
|
|
|
|
if (B_Base) {
|
|
Index = B_Base->getIndex();
|
|
IsExtern = 1;
|
|
}
|
|
else {
|
|
Index = B_SD.getFragment()->getParent()->getOrdinal() + 1;
|
|
IsExtern = 0;
|
|
}
|
|
Type = macho::RIT_X86_64_Subtractor;
|
|
} else {
|
|
const MCSymbol *Symbol = &Target.getSymA()->getSymbol();
|
|
MCSymbolData &SD = Asm.getSymbolData(*Symbol);
|
|
const MCSymbolData *Base = Asm.getAtom(&SD);
|
|
|
|
// Relocations inside debug sections always use local relocations when
|
|
// possible. This seems to be done because the debugger doesn't fully
|
|
// understand x86_64 relocation entries, and expects to find values that
|
|
// have already been fixed up.
|
|
if (Symbol->isInSection()) {
|
|
const MCSectionMachO &Section = static_cast<const MCSectionMachO&>(
|
|
Fragment->getParent()->getSection());
|
|
if (Section.hasAttribute(MCSectionMachO::S_ATTR_DEBUG))
|
|
Base = 0;
|
|
}
|
|
|
|
// x86_64 almost always uses external relocations, except when there is no
|
|
// symbol to use as a base address (a local symbol with no preceeding
|
|
// non-local symbol).
|
|
if (Base) {
|
|
Index = Base->getIndex();
|
|
IsExtern = 1;
|
|
|
|
// Add the local offset, if needed.
|
|
if (Base != &SD)
|
|
Value += Layout.getSymbolAddress(&SD) - Layout.getSymbolAddress(Base);
|
|
} else if (Symbol->isInSection()) {
|
|
// The index is the section ordinal (1-based).
|
|
Index = SD.getFragment()->getParent()->getOrdinal() + 1;
|
|
IsExtern = 0;
|
|
Value += Layout.getSymbolAddress(&SD);
|
|
|
|
if (IsPCRel)
|
|
Value -= FixupAddress + (1 << Log2Size);
|
|
} else {
|
|
report_fatal_error("unsupported relocation of undefined symbol '" +
|
|
Symbol->getName() + "'");
|
|
}
|
|
|
|
MCSymbolRefExpr::VariantKind Modifier = Target.getSymA()->getKind();
|
|
if (IsPCRel) {
|
|
if (IsRIPRel) {
|
|
if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
|
|
// x86_64 distinguishes movq foo@GOTPCREL so that the linker can
|
|
// rewrite the movq to an leaq at link time if the symbol ends up in
|
|
// the same linkage unit.
|
|
if (unsigned(Fixup.getKind()) == X86::reloc_riprel_4byte_movq_load)
|
|
Type = macho::RIT_X86_64_GOTLoad;
|
|
else
|
|
Type = macho::RIT_X86_64_GOT;
|
|
} else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
|
|
Type = macho::RIT_X86_64_TLV;
|
|
} else if (Modifier != MCSymbolRefExpr::VK_None) {
|
|
report_fatal_error("unsupported symbol modifier in relocation");
|
|
} else {
|
|
Type = macho::RIT_X86_64_Signed;
|
|
|
|
// The Darwin x86_64 relocation format has a problem where it cannot
|
|
// encode an address (L<foo> + <constant>) which is outside the atom
|
|
// containing L<foo>. Generally, this shouldn't occur but it does
|
|
// happen when we have a RIPrel instruction with data following the
|
|
// relocation entry (e.g., movb $012, L0(%rip)). Even with the PCrel
|
|
// adjustment Darwin x86_64 uses, the offset is still negative and
|
|
// the linker has no way to recognize this.
|
|
//
|
|
// To work around this, Darwin uses several special relocation types
|
|
// to indicate the offsets. However, the specification or
|
|
// implementation of these seems to also be incomplete; they should
|
|
// adjust the addend as well based on the actual encoded instruction
|
|
// (the additional bias), but instead appear to just look at the
|
|
// final offset.
|
|
switch (-(Target.getConstant() + (1LL << Log2Size))) {
|
|
case 1: Type = macho::RIT_X86_64_Signed1; break;
|
|
case 2: Type = macho::RIT_X86_64_Signed2; break;
|
|
case 4: Type = macho::RIT_X86_64_Signed4; break;
|
|
}
|
|
}
|
|
} else {
|
|
if (Modifier != MCSymbolRefExpr::VK_None)
|
|
report_fatal_error("unsupported symbol modifier in branch "
|
|
"relocation");
|
|
|
|
Type = macho::RIT_X86_64_Branch;
|
|
}
|
|
} else {
|
|
if (Modifier == MCSymbolRefExpr::VK_GOT) {
|
|
Type = macho::RIT_X86_64_GOT;
|
|
} else if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
|
|
// GOTPCREL is allowed as a modifier on non-PCrel instructions, in
|
|
// which case all we do is set the PCrel bit in the relocation entry;
|
|
// this is used with exception handling, for example. The source is
|
|
// required to include any necessary offset directly.
|
|
Type = macho::RIT_X86_64_GOT;
|
|
IsPCRel = 1;
|
|
} else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
|
|
report_fatal_error("TLVP symbol modifier should have been rip-rel");
|
|
} else if (Modifier != MCSymbolRefExpr::VK_None)
|
|
report_fatal_error("unsupported symbol modifier in relocation");
|
|
else
|
|
Type = macho::RIT_X86_64_Unsigned;
|
|
}
|
|
}
|
|
|
|
// x86_64 always writes custom values into the fixups.
|
|
FixedValue = Value;
|
|
|
|
// struct relocation_info (8 bytes)
|
|
macho::RelocationEntry MRE;
|
|
MRE.Word0 = FixupOffset;
|
|
MRE.Word1 = ((Index << 0) |
|
|
(IsPCRel << 24) |
|
|
(Log2Size << 25) |
|
|
(IsExtern << 27) |
|
|
(Type << 28));
|
|
Relocations[Fragment->getParent()].push_back(MRE);
|
|
}
|
|
|
|
void RecordScatteredRelocation(const MCAssembler &Asm,
|
|
const MCAsmLayout &Layout,
|
|
const MCFragment *Fragment,
|
|
const MCFixup &Fixup, MCValue Target,
|
|
uint64_t &FixedValue) {
|
|
uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
|
|
unsigned IsPCRel = isFixupKindPCRel(Fixup.getKind());
|
|
unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
|
|
unsigned Type = macho::RIT_Vanilla;
|
|
|
|
// See <reloc.h>.
|
|
const MCSymbol *A = &Target.getSymA()->getSymbol();
|
|
MCSymbolData *A_SD = &Asm.getSymbolData(*A);
|
|
|
|
if (!A_SD->getFragment())
|
|
report_fatal_error("symbol '" + A->getName() +
|
|
"' can not be undefined in a subtraction expression");
|
|
|
|
uint32_t Value = Layout.getSymbolAddress(A_SD);
|
|
uint32_t Value2 = 0;
|
|
|
|
if (const MCSymbolRefExpr *B = Target.getSymB()) {
|
|
MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());
|
|
|
|
if (!B_SD->getFragment())
|
|
report_fatal_error("symbol '" + B->getSymbol().getName() +
|
|
"' can not be undefined in a subtraction expression");
|
|
|
|
// Select the appropriate difference relocation type.
|
|
//
|
|
// Note that there is no longer any semantic difference between these two
|
|
// relocation types from the linkers point of view, this is done solely
|
|
// for pedantic compatibility with 'as'.
|
|
Type = A_SD->isExternal() ? macho::RIT_Difference :
|
|
macho::RIT_LocalDifference;
|
|
Value2 = Layout.getSymbolAddress(B_SD);
|
|
}
|
|
|
|
// Relocations are written out in reverse order, so the PAIR comes first.
|
|
if (Type == macho::RIT_Difference || Type == macho::RIT_LocalDifference) {
|
|
macho::RelocationEntry MRE;
|
|
MRE.Word0 = ((0 << 0) |
|
|
(macho::RIT_Pair << 24) |
|
|
(Log2Size << 28) |
|
|
(IsPCRel << 30) |
|
|
macho::RF_Scattered);
|
|
MRE.Word1 = Value2;
|
|
Relocations[Fragment->getParent()].push_back(MRE);
|
|
}
|
|
|
|
macho::RelocationEntry MRE;
|
|
MRE.Word0 = ((FixupOffset << 0) |
|
|
(Type << 24) |
|
|
(Log2Size << 28) |
|
|
(IsPCRel << 30) |
|
|
macho::RF_Scattered);
|
|
MRE.Word1 = Value;
|
|
Relocations[Fragment->getParent()].push_back(MRE);
|
|
}
|
|
|
|
void RecordTLVPRelocation(const MCAssembler &Asm,
|
|
const MCAsmLayout &Layout,
|
|
const MCFragment *Fragment,
|
|
const MCFixup &Fixup, MCValue Target,
|
|
uint64_t &FixedValue) {
|
|
assert(Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP &&
|
|
!Is64Bit &&
|
|
"Should only be called with a 32-bit TLVP relocation!");
|
|
|
|
unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
|
|
uint32_t Value = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
|
|
unsigned IsPCRel = 0;
|
|
|
|
// Get the symbol data.
|
|
MCSymbolData *SD_A = &Asm.getSymbolData(Target.getSymA()->getSymbol());
|
|
unsigned Index = SD_A->getIndex();
|
|
|
|
// We're only going to have a second symbol in pic mode and it'll be a
|
|
// subtraction from the picbase. For 32-bit pic the addend is the difference
|
|
// between the picbase and the next address. For 32-bit static the addend
|
|
// is zero.
|
|
if (Target.getSymB()) {
|
|
// If this is a subtraction then we're pcrel.
|
|
uint32_t FixupAddress =
|
|
Layout.getFragmentAddress(Fragment) + Fixup.getOffset();
|
|
MCSymbolData *SD_B = &Asm.getSymbolData(Target.getSymB()->getSymbol());
|
|
IsPCRel = 1;
|
|
FixedValue = (FixupAddress - Layout.getSymbolAddress(SD_B) +
|
|
Target.getConstant());
|
|
FixedValue += 1ULL << Log2Size;
|
|
} else {
|
|
FixedValue = 0;
|
|
}
|
|
|
|
// struct relocation_info (8 bytes)
|
|
macho::RelocationEntry MRE;
|
|
MRE.Word0 = Value;
|
|
MRE.Word1 = ((Index << 0) |
|
|
(IsPCRel << 24) |
|
|
(Log2Size << 25) |
|
|
(1 << 27) | // Extern
|
|
(macho::RIT_TLV << 28)); // Type
|
|
Relocations[Fragment->getParent()].push_back(MRE);
|
|
}
|
|
|
|
void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,
|
|
const MCFragment *Fragment, const MCFixup &Fixup,
|
|
MCValue Target, uint64_t &FixedValue) {
|
|
if (Is64Bit) {
|
|
RecordX86_64Relocation(Asm, Layout, Fragment, Fixup, Target, FixedValue);
|
|
return;
|
|
}
|
|
|
|
unsigned IsPCRel = isFixupKindPCRel(Fixup.getKind());
|
|
unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
|
|
|
|
// If this is a 32-bit TLVP reloc it's handled a bit differently.
|
|
if (Target.getSymA() &&
|
|
Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP) {
|
|
RecordTLVPRelocation(Asm, Layout, Fragment, Fixup, Target, FixedValue);
|
|
return;
|
|
}
|
|
|
|
// If this is a difference or a defined symbol plus an offset, then we need
|
|
// a scattered relocation entry.
|
|
// Differences always require scattered relocations.
|
|
if (Target.getSymB())
|
|
return RecordScatteredRelocation(Asm, Layout, Fragment, Fixup,
|
|
Target, FixedValue);
|
|
|
|
// Get the symbol data, if any.
|
|
MCSymbolData *SD = 0;
|
|
if (Target.getSymA())
|
|
SD = &Asm.getSymbolData(Target.getSymA()->getSymbol());
|
|
|
|
// If this is an internal relocation with an offset, it also needs a
|
|
// scattered relocation entry.
|
|
uint32_t Offset = Target.getConstant();
|
|
if (IsPCRel)
|
|
Offset += 1 << Log2Size;
|
|
if (Offset && SD && !doesSymbolRequireExternRelocation(SD))
|
|
return RecordScatteredRelocation(Asm, Layout, Fragment, Fixup,
|
|
Target, FixedValue);
|
|
|
|
// See <reloc.h>.
|
|
uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
|
|
unsigned Index = 0;
|
|
unsigned IsExtern = 0;
|
|
unsigned Type = 0;
|
|
|
|
if (Target.isAbsolute()) { // constant
|
|
// SymbolNum of 0 indicates the absolute section.
|
|
//
|
|
// FIXME: Currently, these are never generated (see code below). I cannot
|
|
// find a case where they are actually emitted.
|
|
Type = macho::RIT_Vanilla;
|
|
} else {
|
|
// Check whether we need an external or internal relocation.
|
|
if (doesSymbolRequireExternRelocation(SD)) {
|
|
IsExtern = 1;
|
|
Index = SD->getIndex();
|
|
// For external relocations, make sure to offset the fixup value to
|
|
// compensate for the addend of the symbol address, if it was
|
|
// undefined. This occurs with weak definitions, for example.
|
|
if (!SD->Symbol->isUndefined())
|
|
FixedValue -= Layout.getSymbolAddress(SD);
|
|
} else {
|
|
// The index is the section ordinal (1-based).
|
|
Index = SD->getFragment()->getParent()->getOrdinal() + 1;
|
|
}
|
|
|
|
Type = macho::RIT_Vanilla;
|
|
}
|
|
|
|
// struct relocation_info (8 bytes)
|
|
macho::RelocationEntry MRE;
|
|
MRE.Word0 = FixupOffset;
|
|
MRE.Word1 = ((Index << 0) |
|
|
(IsPCRel << 24) |
|
|
(Log2Size << 25) |
|
|
(IsExtern << 27) |
|
|
(Type << 28));
|
|
Relocations[Fragment->getParent()].push_back(MRE);
|
|
}
|
|
|
|
void BindIndirectSymbols(MCAssembler &Asm) {
|
|
// This is the point where 'as' creates actual symbols for indirect symbols
|
|
// (in the following two passes). It would be easier for us to do this
|
|
// sooner when we see the attribute, but that makes getting the order in the
|
|
// symbol table much more complicated than it is worth.
|
|
//
|
|
// FIXME: Revisit this when the dust settles.
|
|
|
|
// Bind non lazy symbol pointers first.
|
|
unsigned IndirectIndex = 0;
|
|
for (MCAssembler::indirect_symbol_iterator it = Asm.indirect_symbol_begin(),
|
|
ie = Asm.indirect_symbol_end(); it != ie; ++it, ++IndirectIndex) {
|
|
const MCSectionMachO &Section =
|
|
cast<MCSectionMachO>(it->SectionData->getSection());
|
|
|
|
if (Section.getType() != MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS)
|
|
continue;
|
|
|
|
// Initialize the section indirect symbol base, if necessary.
|
|
if (!IndirectSymBase.count(it->SectionData))
|
|
IndirectSymBase[it->SectionData] = IndirectIndex;
|
|
|
|
Asm.getOrCreateSymbolData(*it->Symbol);
|
|
}
|
|
|
|
// Then lazy symbol pointers and symbol stubs.
|
|
IndirectIndex = 0;
|
|
for (MCAssembler::indirect_symbol_iterator it = Asm.indirect_symbol_begin(),
|
|
ie = Asm.indirect_symbol_end(); it != ie; ++it, ++IndirectIndex) {
|
|
const MCSectionMachO &Section =
|
|
cast<MCSectionMachO>(it->SectionData->getSection());
|
|
|
|
if (Section.getType() != MCSectionMachO::S_LAZY_SYMBOL_POINTERS &&
|
|
Section.getType() != MCSectionMachO::S_SYMBOL_STUBS)
|
|
continue;
|
|
|
|
// Initialize the section indirect symbol base, if necessary.
|
|
if (!IndirectSymBase.count(it->SectionData))
|
|
IndirectSymBase[it->SectionData] = IndirectIndex;
|
|
|
|
// Set the symbol type to undefined lazy, but only on construction.
|
|
//
|
|
// FIXME: Do not hardcode.
|
|
bool Created;
|
|
MCSymbolData &Entry = Asm.getOrCreateSymbolData(*it->Symbol, &Created);
|
|
if (Created)
|
|
Entry.setFlags(Entry.getFlags() | 0x0001);
|
|
}
|
|
}
|
|
|
|
/// ComputeSymbolTable - Compute the symbol table data
|
|
///
|
|
/// \param StringTable [out] - The string table data.
|
|
/// \param StringIndexMap [out] - Map from symbol names to offsets in the
|
|
/// string table.
|
|
void ComputeSymbolTable(MCAssembler &Asm, SmallString<256> &StringTable,
|
|
std::vector<MachSymbolData> &LocalSymbolData,
|
|
std::vector<MachSymbolData> &ExternalSymbolData,
|
|
std::vector<MachSymbolData> &UndefinedSymbolData) {
|
|
// Build section lookup table.
|
|
DenseMap<const MCSection*, uint8_t> SectionIndexMap;
|
|
unsigned Index = 1;
|
|
for (MCAssembler::iterator it = Asm.begin(),
|
|
ie = Asm.end(); it != ie; ++it, ++Index)
|
|
SectionIndexMap[&it->getSection()] = Index;
|
|
assert(Index <= 256 && "Too many sections!");
|
|
|
|
// Index 0 is always the empty string.
|
|
StringMap<uint64_t> StringIndexMap;
|
|
StringTable += '\x00';
|
|
|
|
// Build the symbol arrays and the string table, but only for non-local
|
|
// symbols.
|
|
//
|
|
// The particular order that we collect the symbols and create the string
|
|
// table, then sort the symbols is chosen to match 'as'. Even though it
|
|
// doesn't matter for correctness, this is important for letting us diff .o
|
|
// files.
|
|
for (MCAssembler::symbol_iterator it = Asm.symbol_begin(),
|
|
ie = Asm.symbol_end(); it != ie; ++it) {
|
|
const MCSymbol &Symbol = it->getSymbol();
|
|
|
|
// Ignore non-linker visible symbols.
|
|
if (!Asm.isSymbolLinkerVisible(it->getSymbol()))
|
|
continue;
|
|
|
|
if (!it->isExternal() && !Symbol.isUndefined())
|
|
continue;
|
|
|
|
uint64_t &Entry = StringIndexMap[Symbol.getName()];
|
|
if (!Entry) {
|
|
Entry = StringTable.size();
|
|
StringTable += Symbol.getName();
|
|
StringTable += '\x00';
|
|
}
|
|
|
|
MachSymbolData MSD;
|
|
MSD.SymbolData = it;
|
|
MSD.StringIndex = Entry;
|
|
|
|
if (Symbol.isUndefined()) {
|
|
MSD.SectionIndex = 0;
|
|
UndefinedSymbolData.push_back(MSD);
|
|
} else if (Symbol.isAbsolute()) {
|
|
MSD.SectionIndex = 0;
|
|
ExternalSymbolData.push_back(MSD);
|
|
} else {
|
|
MSD.SectionIndex = SectionIndexMap.lookup(&Symbol.getSection());
|
|
assert(MSD.SectionIndex && "Invalid section index!");
|
|
ExternalSymbolData.push_back(MSD);
|
|
}
|
|
}
|
|
|
|
// Now add the data for local symbols.
|
|
for (MCAssembler::symbol_iterator it = Asm.symbol_begin(),
|
|
ie = Asm.symbol_end(); it != ie; ++it) {
|
|
const MCSymbol &Symbol = it->getSymbol();
|
|
|
|
// Ignore non-linker visible symbols.
|
|
if (!Asm.isSymbolLinkerVisible(it->getSymbol()))
|
|
continue;
|
|
|
|
if (it->isExternal() || Symbol.isUndefined())
|
|
continue;
|
|
|
|
uint64_t &Entry = StringIndexMap[Symbol.getName()];
|
|
if (!Entry) {
|
|
Entry = StringTable.size();
|
|
StringTable += Symbol.getName();
|
|
StringTable += '\x00';
|
|
}
|
|
|
|
MachSymbolData MSD;
|
|
MSD.SymbolData = it;
|
|
MSD.StringIndex = Entry;
|
|
|
|
if (Symbol.isAbsolute()) {
|
|
MSD.SectionIndex = 0;
|
|
LocalSymbolData.push_back(MSD);
|
|
} else {
|
|
MSD.SectionIndex = SectionIndexMap.lookup(&Symbol.getSection());
|
|
assert(MSD.SectionIndex && "Invalid section index!");
|
|
LocalSymbolData.push_back(MSD);
|
|
}
|
|
}
|
|
|
|
// External and undefined symbols are required to be in lexicographic order.
|
|
std::sort(ExternalSymbolData.begin(), ExternalSymbolData.end());
|
|
std::sort(UndefinedSymbolData.begin(), UndefinedSymbolData.end());
|
|
|
|
// Set the symbol indices.
|
|
Index = 0;
|
|
for (unsigned i = 0, e = LocalSymbolData.size(); i != e; ++i)
|
|
LocalSymbolData[i].SymbolData->setIndex(Index++);
|
|
for (unsigned i = 0, e = ExternalSymbolData.size(); i != e; ++i)
|
|
ExternalSymbolData[i].SymbolData->setIndex(Index++);
|
|
for (unsigned i = 0, e = UndefinedSymbolData.size(); i != e; ++i)
|
|
UndefinedSymbolData[i].SymbolData->setIndex(Index++);
|
|
|
|
// The string table is padded to a multiple of 4.
|
|
while (StringTable.size() % 4)
|
|
StringTable += '\x00';
|
|
}
|
|
|
|
void ExecutePostLayoutBinding(MCAssembler &Asm) {
|
|
// Create symbol data for any indirect symbols.
|
|
BindIndirectSymbols(Asm);
|
|
|
|
// Compute symbol table information and bind symbol indices.
|
|
ComputeSymbolTable(Asm, StringTable, LocalSymbolData, ExternalSymbolData,
|
|
UndefinedSymbolData);
|
|
}
|
|
|
|
|
|
bool IsFixupFullyResolved(const MCAssembler &Asm,
|
|
const MCValue Target,
|
|
bool IsPCRel,
|
|
const MCFragment *DF) const {
|
|
// If we aren't using scattered symbols, the fixup is fully resolved.
|
|
if (!Asm.getBackend().hasScatteredSymbols())
|
|
return true;
|
|
|
|
// Otherwise, determine whether this value is actually resolved; scattering
|
|
// may cause atoms to move.
|
|
|
|
// Check if we are using the "simple" resolution algorithm (e.g.,
|
|
// i386).
|
|
if (!Asm.getBackend().hasReliableSymbolDifference()) {
|
|
const MCSection *BaseSection = 0;
|
|
if (IsPCRel)
|
|
BaseSection = &DF->getParent()->getSection();
|
|
|
|
return isScatteredFixupFullyResolvedSimple(Asm, Target, BaseSection);
|
|
}
|
|
|
|
// Otherwise, compute the proper answer as reliably as possible.
|
|
|
|
// If this is a PCrel relocation, find the base atom (identified by its
|
|
// symbol) that the fixup value is relative to.
|
|
const MCSymbolData *BaseSymbol = 0;
|
|
if (IsPCRel) {
|
|
BaseSymbol = DF->getAtom();
|
|
if (!BaseSymbol)
|
|
return false;
|
|
}
|
|
|
|
return isScatteredFixupFullyResolved(Asm, Target, BaseSymbol);
|
|
}
|
|
|
|
void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout) {
|
|
unsigned NumSections = Asm.size();
|
|
|
|
// The section data starts after the header, the segment load command (and
|
|
// section headers) and the symbol table.
|
|
unsigned NumLoadCommands = 1;
|
|
uint64_t LoadCommandsSize = Is64Bit ?
|
|
macho::SegmentLoadCommand64Size + NumSections * macho::Section64Size :
|
|
macho::SegmentLoadCommand32Size + NumSections * macho::Section32Size;
|
|
|
|
// Add the symbol table load command sizes, if used.
|
|
unsigned NumSymbols = LocalSymbolData.size() + ExternalSymbolData.size() +
|
|
UndefinedSymbolData.size();
|
|
if (NumSymbols) {
|
|
NumLoadCommands += 2;
|
|
LoadCommandsSize += (macho::SymtabLoadCommandSize +
|
|
macho::DysymtabLoadCommandSize);
|
|
}
|
|
|
|
// Compute the total size of the section data, as well as its file size and
|
|
// vm size.
|
|
uint64_t SectionDataStart = (Is64Bit ? macho::Header64Size :
|
|
macho::Header32Size) + LoadCommandsSize;
|
|
uint64_t SectionDataSize = 0;
|
|
uint64_t SectionDataFileSize = 0;
|
|
uint64_t VMSize = 0;
|
|
for (MCAssembler::const_iterator it = Asm.begin(),
|
|
ie = Asm.end(); it != ie; ++it) {
|
|
const MCSectionData &SD = *it;
|
|
uint64_t Address = Layout.getSectionAddress(&SD);
|
|
uint64_t Size = Layout.getSectionSize(&SD);
|
|
uint64_t FileSize = Layout.getSectionFileSize(&SD);
|
|
|
|
VMSize = std::max(VMSize, Address + Size);
|
|
|
|
if (SD.getSection().isVirtualSection())
|
|
continue;
|
|
|
|
SectionDataSize = std::max(SectionDataSize, Address + Size);
|
|
SectionDataFileSize = std::max(SectionDataFileSize, Address + FileSize);
|
|
}
|
|
|
|
// The section data is padded to 4 bytes.
|
|
//
|
|
// FIXME: Is this machine dependent?
|
|
unsigned SectionDataPadding = OffsetToAlignment(SectionDataFileSize, 4);
|
|
SectionDataFileSize += SectionDataPadding;
|
|
|
|
// Write the prolog, starting with the header and load command...
|
|
WriteHeader(NumLoadCommands, LoadCommandsSize,
|
|
Asm.getSubsectionsViaSymbols());
|
|
WriteSegmentLoadCommand(NumSections, VMSize,
|
|
SectionDataStart, SectionDataSize);
|
|
|
|
// ... and then the section headers.
|
|
uint64_t RelocTableEnd = SectionDataStart + SectionDataFileSize;
|
|
for (MCAssembler::const_iterator it = Asm.begin(),
|
|
ie = Asm.end(); it != ie; ++it) {
|
|
std::vector<macho::RelocationEntry> &Relocs = Relocations[it];
|
|
unsigned NumRelocs = Relocs.size();
|
|
uint64_t SectionStart = SectionDataStart + Layout.getSectionAddress(it);
|
|
WriteSection(Asm, Layout, *it, SectionStart, RelocTableEnd, NumRelocs);
|
|
RelocTableEnd += NumRelocs * macho::RelocationInfoSize;
|
|
}
|
|
|
|
// Write the symbol table load command, if used.
|
|
if (NumSymbols) {
|
|
unsigned FirstLocalSymbol = 0;
|
|
unsigned NumLocalSymbols = LocalSymbolData.size();
|
|
unsigned FirstExternalSymbol = FirstLocalSymbol + NumLocalSymbols;
|
|
unsigned NumExternalSymbols = ExternalSymbolData.size();
|
|
unsigned FirstUndefinedSymbol = FirstExternalSymbol + NumExternalSymbols;
|
|
unsigned NumUndefinedSymbols = UndefinedSymbolData.size();
|
|
unsigned NumIndirectSymbols = Asm.indirect_symbol_size();
|
|
unsigned NumSymTabSymbols =
|
|
NumLocalSymbols + NumExternalSymbols + NumUndefinedSymbols;
|
|
uint64_t IndirectSymbolSize = NumIndirectSymbols * 4;
|
|
uint64_t IndirectSymbolOffset = 0;
|
|
|
|
// If used, the indirect symbols are written after the section data.
|
|
if (NumIndirectSymbols)
|
|
IndirectSymbolOffset = RelocTableEnd;
|
|
|
|
// The symbol table is written after the indirect symbol data.
|
|
uint64_t SymbolTableOffset = RelocTableEnd + IndirectSymbolSize;
|
|
|
|
// The string table is written after symbol table.
|
|
uint64_t StringTableOffset =
|
|
SymbolTableOffset + NumSymTabSymbols * (Is64Bit ? macho::Nlist64Size :
|
|
macho::Nlist32Size);
|
|
WriteSymtabLoadCommand(SymbolTableOffset, NumSymTabSymbols,
|
|
StringTableOffset, StringTable.size());
|
|
|
|
WriteDysymtabLoadCommand(FirstLocalSymbol, NumLocalSymbols,
|
|
FirstExternalSymbol, NumExternalSymbols,
|
|
FirstUndefinedSymbol, NumUndefinedSymbols,
|
|
IndirectSymbolOffset, NumIndirectSymbols);
|
|
}
|
|
|
|
// Write the actual section data.
|
|
for (MCAssembler::const_iterator it = Asm.begin(),
|
|
ie = Asm.end(); it != ie; ++it)
|
|
Asm.WriteSectionData(it, Layout, this);
|
|
|
|
// Write the extra padding.
|
|
WriteZeros(SectionDataPadding);
|
|
|
|
// Write the relocation entries.
|
|
for (MCAssembler::const_iterator it = Asm.begin(),
|
|
ie = Asm.end(); it != ie; ++it) {
|
|
// Write the section relocation entries, in reverse order to match 'as'
|
|
// (approximately, the exact algorithm is more complicated than this).
|
|
std::vector<macho::RelocationEntry> &Relocs = Relocations[it];
|
|
for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {
|
|
Write32(Relocs[e - i - 1].Word0);
|
|
Write32(Relocs[e - i - 1].Word1);
|
|
}
|
|
}
|
|
|
|
// Write the symbol table data, if used.
|
|
if (NumSymbols) {
|
|
// Write the indirect symbol entries.
|
|
for (MCAssembler::const_indirect_symbol_iterator
|
|
it = Asm.indirect_symbol_begin(),
|
|
ie = Asm.indirect_symbol_end(); it != ie; ++it) {
|
|
// Indirect symbols in the non lazy symbol pointer section have some
|
|
// special handling.
|
|
const MCSectionMachO &Section =
|
|
static_cast<const MCSectionMachO&>(it->SectionData->getSection());
|
|
if (Section.getType() == MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS) {
|
|
// If this symbol is defined and internal, mark it as such.
|
|
if (it->Symbol->isDefined() &&
|
|
!Asm.getSymbolData(*it->Symbol).isExternal()) {
|
|
uint32_t Flags = macho::ISF_Local;
|
|
if (it->Symbol->isAbsolute())
|
|
Flags |= macho::ISF_Absolute;
|
|
Write32(Flags);
|
|
continue;
|
|
}
|
|
}
|
|
|
|
Write32(Asm.getSymbolData(*it->Symbol).getIndex());
|
|
}
|
|
|
|
// FIXME: Check that offsets match computed ones.
|
|
|
|
// Write the symbol table entries.
|
|
for (unsigned i = 0, e = LocalSymbolData.size(); i != e; ++i)
|
|
WriteNlist(LocalSymbolData[i], Layout);
|
|
for (unsigned i = 0, e = ExternalSymbolData.size(); i != e; ++i)
|
|
WriteNlist(ExternalSymbolData[i], Layout);
|
|
for (unsigned i = 0, e = UndefinedSymbolData.size(); i != e; ++i)
|
|
WriteNlist(UndefinedSymbolData[i], Layout);
|
|
|
|
// Write the string table.
|
|
OS << StringTable.str();
|
|
}
|
|
}
|
|
};
|
|
|
|
}
|
|
|
|
MCObjectWriter *llvm::createMachObjectWriter(raw_ostream &OS, bool is64Bit,
|
|
uint32_t CPUType,
|
|
uint32_t CPUSubtype,
|
|
bool IsLittleEndian) {
|
|
return new MachObjectWriter(OS, is64Bit, CPUType, CPUSubtype, IsLittleEndian);
|
|
}
|