Nadav Rotem 0c8607ba6a Revert 172708. ... The optimization handles esoteric cases but adds a lot of complexity both to the X86 backend and to other backends. This optimization disables an important canonicalization of chains of SEXT nodes and makes SEXT and ZEXT asymmetrical. Disabling the canonicalization of consecutive SEXT nodes into a single node disables other DAG optimizations that assume that there is only one SEXT node. The AVX mask optimizations is one example. Additionally this optimization does not update the cost model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172968 91177308-0d34-0410-b5e6-96231b3b80d8		2013-01-20 08:35:56 +00:00
..
ARM	Remove some register allocation order dependencies.	2013-01-19 00:03:32 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
Generic	For inline asm:	2013-01-11 18:12:39 +00:00
Hexagon	Add indexed load/store instructions for offset validation check.	2013-01-17 18:42:37 +00:00
MBlaze
Mips	[mips] MipsTargetLowering::getSetCCResultType should return a vector type if	2013-01-04 20:06:01 +00:00
MSP430	Add support for varargs functions for msp430.	2012-11-21 17:28:27 +00:00
NVPTX	[NVPTX] Fix crash with unnamed struct arguments	2012-12-05 20:50:28 +00:00
PowerPC	Restore reverted test case, this time with REQUIRES: asserts	2013-01-17 19:46:51 +00:00
R600	DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes	2013-01-02 22:13:01 +00:00
SI	Add R600 backend	2012-12-11 21:25:42 +00:00
SPARC	Use TargetTransformInfo to control switch-to-lookup table transformation	2012-10-30 11:23:25 +00:00
Thumb	Use the 'count' attribute to calculate the upper bound of an array.	2012-12-04 21:34:03 +00:00
Thumb2	Remove some register allocation order dependencies.	2013-01-19 00:03:32 +00:00
X86	Revert 172708.	2013-01-20 08:35:56 +00:00
XCore	Fix handling of aliases to functions.	2012-11-16 21:12:38 +00:00