Evan Cheng 3144687df7 - Allow target to specify when is register pressure "too high". In most cases, ... it's too late to start backing off aggressive latency scheduling when most of the registers are in use so the threshold should be a bit tighter. - Correctly handle live out's and extract_subreg etc. - Enable register pressure aware scheduling by default for hybrid scheduler. For ARM, this is almost always a win on # of instructions. It's runtime neutral for most of the tests. But for some kernels with high register pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by 54 and sped up by 20%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109279 91177308-0d34-0410-b5e6-96231b3b80d8		2010-07-23 22:39:59 +00:00
..
Mangler.h	Revert r107205 and r107207.	2010-06-29 22:34:52 +00:00
SubtargetFeature.h	The getDefaultSubtargetFeatures method of SubtargetFeature did actually return a	2010-05-11 00:30:02 +00:00
Target.td	Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and	2010-07-16 22:20:36 +00:00
TargetAsmBackend.h	MC: Change RelaxInstruction to only take the input and output instructions.	2010-05-26 18:15:06 +00:00
TargetAsmLexer.h	Moved InstallLexer() from the X86-specific AsmLexer	2010-01-31 02:28:18 +00:00
TargetAsmParser.h	TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.	2010-07-19 05:44:09 +00:00
TargetCallingConv.h	Split the SDValue out of OutputArg so that SelectionDAG-independent	2010-07-07 15:54:55 +00:00
TargetCallingConv.td
TargetData.h	Revert r97064. Duncan pointed out that bitcasts are defined in	2010-02-25 15:20:39 +00:00
TargetELFWriterInfo.h
TargetFrameInfo.h	Use explicit structs instead of std::pair to map callee saved regs to spill slots.	2009-09-27 17:58:47 +00:00
TargetInstrDesc.h	Start TargetRegisterClass indices at 0 instead of 1, so that	2010-06-18 18:13:55 +00:00
TargetInstrInfo.h	eliminate the TargetInstrInfo::GetInstSizeInBytes hook.	2010-07-22 21:27:00 +00:00
TargetInstrItineraries.h	declare a class with 'class' instead of struct to avoid tag mismatch	2010-06-12 15:46:56 +00:00
TargetIntrinsicInfo.h	Reintroduce support for overloading target intrinsics	2009-11-05 03:19:08 +00:00
TargetJITInfo.h	* Move stub allocation inside the JITEmitter, instead of exposing a	2009-11-23 23:35:19 +00:00
TargetLowering.h	- Allow target to specify when is register pressure "too high". In most cases,	2010-07-23 22:39:59 +00:00
TargetLoweringObjectFile.h	Add a new section and accessor for TLS data.	2010-05-22 00:00:58 +00:00
TargetMachine.h	Warnings patrol.	2010-07-22 21:51:30 +00:00
TargetOpcodes.h	Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and	2010-07-16 22:20:36 +00:00
TargetOptions.h	Split -enable-finite-only-fp-math to two options:	2010-07-15 22:07:12 +00:00
TargetRegisterInfo.h	Revert r109102 for now as it's causing JIT miscompilations.	2010-07-23 12:16:56 +00:00
TargetRegistry.h	Target: Give the TargetAsmParser access to the TargetMachine.	2010-07-19 00:33:49 +00:00
TargetSchedule.td	Make processor FUs unique for given itinerary. This extends the limit of 32	2010-04-18 20:31:01 +00:00
TargetSelect.h	Add the rest of the build system logic for optional target disassemblers	2009-11-25 04:46:58 +00:00
TargetSelectionDAG.td	finally remove the immAllOnesV_bc/immAllZerosV_bc patterns	2010-03-28 08:43:23 +00:00
TargetSelectionDAGInfo.h	Fix a comment.	2010-05-11 18:03:41 +00:00
TargetSubtarget.h	Allow target to specify regclass for which antideps will only be broken along the critical path.	2009-11-13 19:52:48 +00:00