llvm-6502/test/CodeGen
Cameron Zwarich faff127319 In the ARM global merging pass, allow extraneous alignment specifiers. This pass
already makes the assumption, which is correct on ARM, that a type's alignment is
less than its alloc size. This improves codegen with Clang (which inserts a lot of
extraneous alignment specifiers) and fixes <rdar://problem/9695089>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 22:24:25 +00:00
..
Alpha
ARM In the ARM global merging pass, allow extraneous alignment specifiers. This pass 2011-06-29 22:24:25 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic
MBlaze
Mips
MSP430
PowerPC Implement ISD::VAARG lowering on PPC32. 2011-06-28 15:30:42 +00:00
PTX
SPARC
SystemZ
Thumb
Thumb2 Don't depend on the optimization reverted in r134067. 2011-06-29 14:07:18 +00:00
X86 Revert a part of r126557 which could create unschedulable DAGs. 2011-06-29 13:47:25 +00:00
XCore