llvm-6502/test/CodeGen
Anton Korobeynikov 32a1b25781 2 more vdup.32 cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:36:50 +00:00
..
Alpha Make promotion in operation legalization for SETCC work correctly. 2009-07-17 05:16:04 +00:00
ARM 2 more vdup.32 cases 2009-08-07 22:36:50 +00:00
Blackfin Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs. 2009-08-05 03:53:14 +00:00
CBackend
CellSPU
CPP
Generic Remove the IA-64 backend. 2009-07-24 00:30:09 +00:00
Mips Pass target triple string in to TargetMachine constructor. 2009-08-03 04:03:51 +00:00
MSP430
PIC16 this passes. 2009-08-06 03:55:49 +00:00
PowerPC Revert r75663 (and r76805), as it is causing regressions on powerpc. 2009-07-23 00:09:46 +00:00
SPARC
SystemZ Add testcases for reg-mem arithemtics added recently 2009-08-05 17:04:32 +00:00
Thumb tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. 2009-07-28 07:38:35 +00:00
Thumb2 Thumb2 32-bit ldm / stm needs .w suffix if submode is ia. 2009-08-07 21:19:10 +00:00
X86 Add the testcase from PR 4668. This works at the 2009-08-07 00:04:42 +00:00
XCore Add extra SEXT pattern. 2009-08-02 22:45:24 +00:00