llvm-6502/lib/Target/CellSPU
Chandler Carruth ac03e736c7 Rewrite the CMake build to use explicit dependencies between libraries,
specified in the same file that the library itself is created. This is
more idiomatic for CMake builds, and also allows us to correctly specify
dependencies that are missed due to bugs in the GenLibDeps perl script,
or change from compiler to compiler. On Linux, this returns CMake to
a place where it can relably rebuild several targets of LLVM.

I have tried not to change the dependencies from the ones in the current
auto-generated file. The only places I've really diverged are in places
where I was seeing link failures, and added a dependency. The goal of
this patch is not to start changing the dependencies, merely to move
them into the correct location, and an explicit form that we can control
and change when necessary.

This also removes a serialization point in the build because we don't
have to scan all the libraries before we begin building various tools.
We no longer have a step of the build that regenerates a file inside the
source tree. A few other associated cleanups fall out of this.

This isn't really finished yet though. After talking to dgregor he urged
switching to a single CMake macro to construct libraries with both
sources and dependencies in the arguments. Migrating from the two macros
to that style will be a follow-up patch.

Also, llvm-config is still generated with GenLibDeps.pl, which means it
still has slightly buggy dependencies. The internal CMake
'llvm-config-like' macro uses the correct explicitly specified
dependencies however. A future patch will switch llvm-config generation
(when using CMake) to be based on these deps as well.

This may well break Windows. I'm getting a machine set up now to dig
into any failures there. If anyone can chime in with problems they see
or ideas of how to solve them for Windows, much appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 00:14:25 +00:00
..
MCTargetDesc Rewrite the CMake build to use explicit dependencies between libraries, 2011-07-29 00:14:25 +00:00
TargetInfo Rewrite the CMake build to use explicit dependencies between libraries, 2011-07-29 00:14:25 +00:00
CellSDKIntrinsics.td do some serious surgery on CellSPU to get it back into a world 2010-03-15 05:53:47 +00:00
CMakeLists.txt Rewrite the CMake build to use explicit dependencies between libraries, 2011-07-29 00:14:25 +00:00
Makefile Next round of MC refactoring. This patch factor MC table instantiations, MC 2011-07-14 20:59:42 +00:00
README.txt Allow sign-extending of i8 and i16 to i128 on SPU. 2011-01-20 15:49:06 +00:00
SPU64InstrInfo.td Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
SPU128InstrInfo.td
SPU.h Next round of MC refactoring. This patch factor MC table instantiations, MC 2011-07-14 20:59:42 +00:00
SPU.td
SPUAsmPrinter.cpp Add branch hinting for SPU. 2011-02-28 14:08:24 +00:00
SPUCallingConv.td Remove all traces of v2[i,f]32 on SPU. 2010-08-18 10:04:39 +00:00
SPUFrameLowering.cpp Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for 2011-07-18 22:29:13 +00:00
SPUFrameLowering.h Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for 2011-07-18 22:29:13 +00:00
SPUHazardRecognizers.cpp Various bits of framework needed for precise machine-level selection 2010-12-24 05:03:26 +00:00
SPUHazardRecognizers.h Various bits of framework needed for precise machine-level selection 2010-12-24 05:03:26 +00:00
SPUInstrBuilder.h
SPUInstrFormats.td Add branch hinting for SPU. 2011-02-28 14:08:24 +00:00
SPUInstrInfo.cpp Next round of MC refactoring. This patch factor MC table instantiations, MC 2011-07-14 20:59:42 +00:00
SPUInstrInfo.h Hide the call to InitMCInstrInfo into tblgen generated ctor. 2011-07-01 17:57:27 +00:00
SPUInstrInfo.td Allow vector shifts (shl,lshr,ashr) on SPU. 2011-03-04 13:19:18 +00:00
SPUISelDAGToDAG.cpp Next round of MC refactoring. This patch factor MC table instantiations, MC 2011-07-14 20:59:42 +00:00
SPUISelLowering.cpp Code generation for 'fence' instruction. 2011-07-27 22:21:52 +00:00
SPUISelLowering.h land David Blaikie's patch to de-constify Type, with a few tweaks. 2011-07-18 04:54:35 +00:00
SPUMachineFunction.h Move per-function state out of TargetLowering subclasses and into 2010-04-17 14:41:14 +00:00
SPUMathInstr.td Remove all traces of v2[i,f]32 on SPU. 2010-08-18 10:04:39 +00:00
SPUNodes.td Flag -> Glue, the ongoing saga 2010-12-23 18:28:41 +00:00
SPUNopFiller.cpp Fix a thinko in 123226 that caused test failures on "other" platforms. 2011-01-11 11:27:56 +00:00
SPUOperands.td Don't feed 19 bit immediates to ILA. 2010-12-17 09:36:09 +00:00
SPURegisterInfo.cpp Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for 2011-07-18 22:29:13 +00:00
SPURegisterInfo.h Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down 2011-07-18 20:57:22 +00:00
SPURegisterInfo.td Use set operations instead of plain lists to enumerate register classes. 2011-06-15 23:28:14 +00:00
SPURegisterNames.h Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc 2011-06-27 18:32:37 +00:00
SPUSchedule.td Split up RotateShift itinerary in SPU. 2011-01-17 13:33:19 +00:00
SPUSelectionDAGInfo.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
SPUSelectionDAGInfo.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
SPUSubtarget.cpp Next round of MC refactoring. This patch factor MC table instantiations, MC 2011-07-14 20:59:42 +00:00
SPUSubtarget.h Compute feature bits at time of MCSubtargetInfo initialization. 2011-07-07 07:07:08 +00:00
SPUTargetMachine.cpp - Move CodeModel from a TargetMachine global option to MCCodeGenInfo. 2011-07-20 07:51:56 +00:00
SPUTargetMachine.h - Move CodeModel from a TargetMachine global option to MCCodeGenInfo. 2011-07-20 07:51:56 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)
- Nehal Desai (debugging, i32 operations, RoadRunner SPU expertise)

Some minor fixes added by Kalle Raiskila.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE.

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

TODO:
* Create a machine pass for performing dual-pipeline scheduling specifically
  for CellSPU, and insert branch prediction instructions as needed.

* i32 instructions:

  * i32 division (work-in-progress)

* i64 support (see i64operations.c test harness):

  * shifts and comparison operators: done
  * sign and zero extension: done
  * addition: done
  * subtraction: needed
  * multiplication: done

* i128 support:

  * zero extension, any extension: done
  * sign extension: done
  * arithmetic operators (add, sub, mul, div): needed
  * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed

    * or: done

* f64 support

  * Comparison operators:
    SETOEQ              unimplemented
    SETOGT              unimplemented
    SETOGE              unimplemented
    SETOLT              unimplemented
    SETOLE              unimplemented
    SETONE              unimplemented
    SETO                done (lowered)
    SETUO               done (lowered)
    SETUEQ              unimplemented
    SETUGT              unimplemented
    SETUGE              unimplemented
    SETULT              unimplemented
    SETULE              unimplemented
    SETUNE              unimplemented

* LLVM vector suport

  * VSETCC needs to be implemented. It's pretty straightforward to code, but
    needs implementation.

* Intrinsics

  * spu.h instrinsics added but not tested. Need to have an operational
    llvm-spu-gcc in order to write a unit test harness.

===-------------------------------------------------------------------------===