Misha Brukman 33cc12319c The 'rd' register is consistently mentioned last in instruction definitions. ... Created new classes from which instructions inherit their ordering of fields. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6461 91177308-0d34-0410-b5e6-96231b3b80d8		2003-05-31 06:25:19 +00:00
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Analysis	Eliminate unnecessary ->get calls that are now automatically handled.	2003-05-29 15:12:27 +00:00
Archive	Fixed 'prevalent'.	2003-04-23 02:59:05 +00:00
AsmParser	Fix bugs:	2003-05-21 17:48:56 +00:00
Bytecode	Fix bug: Assembler/2003-05-03-BytecodeReaderProblem.llx	2003-05-22 18:35:38 +00:00
CodeGen	When converting virtual registers to immediate constants, change the opcode.	2003-05-30 20:36:27 +00:00
ExecutionEngine	Since malloc is no longer used, no need to free() memory.	2003-05-30 20:39:37 +00:00
Linker	Fix Bug: Linker/2003-05-15-TypeProblem.ll	2003-05-15 16:30:55 +00:00
Support	Make _sure_ we don't go into an infinite loop if a signal happens!	2003-05-27 16:25:04 +00:00
Target	The 'rd' register is consistently mentioned last in instruction definitions.	2003-05-31 06:25:19 +00:00
Transforms	Okay totally give up on trying to optimize aggregates that cannot be completely	2003-05-30 19:22:14 +00:00
VMCore	Fix constant folding to ALWAYS work.	2003-05-27 19:16:07 +00:00
Makefile	Compile sub-directories in parallel, because they don't have interdependencies	2002-09-18 03:25:58 +00:00