Eli Friedman 34c4485b74 Add mayLoad/mayStore markings to ARM 64-bit atomic pseudo-instructions. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139179 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-06 20:53:37 +00:00
..
Analysis	Now, named mdnode llvm.dbg.cu keeps track of all compile units in a module. Update DebugInfoFinder to collect compile units from llvm.dbg.cu.	2011-09-06 17:40:08 +00:00
Archive
AsmParser
Bitcode
CodeGen	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
CompilerDriver
ExecutionEngine
Linker
MC	As a first step, emit both the compact unwind and CIE/FDEs for a function.	2011-09-06 18:37:11 +00:00
Object
Support
Target	Add mayLoad/mayStore markings to ARM 64-bit atomic pseudo-instructions.	2011-09-06 20:53:37 +00:00
Transforms	Add -verify-indvars for imperfect SCEV trip count verification after indvars.	2011-09-06 20:20:38 +00:00
VMCore	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
CMakeLists.txt
Makefile