..
2008-06-05-Carry.ll
2008-07-03-SRet.ll
2008-07-06-fadd64.ll
2008-07-07-Float2Int.ll
2008-07-07-FPExtend.ll
2008-07-07-IntDoubleConvertions.ll
2008-07-15-InternalConstant.ll
2008-07-15-SmallSection.ll
2008-07-16-SignExtInReg.ll
2008-07-22-Cstpool.ll
2008-07-23-fpcmp.ll
Fix the remaining TCL-style quotes found in the testsuite. This is
2012-07-02 19:09:46 +00:00
2008-07-29-icmp.ll
Fix the remaining TCL-style quotes found in the testsuite. This is
2012-07-02 19:09:46 +00:00
2008-07-31-fcopysign.ll
2008-08-01-AsmInline.ll
2008-08-03-fabs64.ll
2008-08-03-ReturnDouble.ll
2008-08-04-Bitconvert.ll
2008-08-06-Alloca.ll
2008-08-07-CC.ll
2008-08-07-FPRound.ll
2008-08-08-bswap.ll
2008-08-08-ctlz.ll
2008-10-13-LegalizerBug.ll
2008-11-10-xint_to_fp.ll
2009-11-16-CstPoolLoad.ll
2010-04-07-DbgValueOtherTargets.ll
2010-07-20-Switch.ll
Fix test cases.
2012-06-14 01:21:00 +00:00
2010-11-09-CountLeading.ll
2010-11-09-Mul.ll
2011-05-26-BranchKillsVreg.ll
addc.ll
alloca.ll
Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.
2012-07-31 20:54:48 +00:00
analyzebranch.ll
Fix test cases.
2012-05-12 03:25:16 +00:00
and1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
asm-large-immediate.ll
The inline asm operand modifier 'n' is suppose
2012-06-21 21:37:54 +00:00
atomic.ll
Fix test cases.
2012-05-12 03:25:16 +00:00
blockaddr.ll
br-jmp.ll
brdelayslot.ll
Add option disable-mips-delay-filler. Turn on mips' delay slot filler by
2012-08-22 02:51:28 +00:00
bswap.ll
buildpairextractelementf64.ll
cmov.ll
Fix test cases in test/CodeGen/Mips.
2012-06-02 00:05:45 +00:00
constantfp0.ll
cprestore.ll
Fix test cases.
2012-05-12 03:25:16 +00:00
divrem.ll
double2int.ll
eh.ll
Fix test cases.
2012-05-12 03:25:16 +00:00
extins.ll
fabs.ll
Add test triples to fix win32 failures. Revert workaround from r161292.
2012-08-08 20:31:37 +00:00
fastcc.ll
Implement fastcc calling convention for MIPS.
2012-06-13 18:06:00 +00:00
fcopysign-f32-f64.ll
fcopysign.ll
fmadd1.ll
fneg.ll
fp-indexed-ls.ll
Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as
2012-07-31 18:16:49 +00:00
fp-spill-reload.ll
fpbr.ll
frame-address.ll
frem.ll
global-address.ll
global-pointer-reg.ll
gprestore.ll
Fix test cases.
2012-05-12 03:25:16 +00:00
helloworld.ll
When store nodes or memcpy nodes are created to copy the function call
2012-07-31 18:46:41 +00:00
i64arg.ll
Eliminate the stack slot used to save the global base register.
2012-07-25 03:16:47 +00:00
imm.ll
indirectcall.ll
inlineasm64.ll
inlineasm_constraint.ll
inlineasm-cnstrnt-bad-I-1.ll
inlineasm-cnstrnt-bad-J.ll
inlineasm-cnstrnt-bad-K.ll
inlineasm-cnstrnt-bad-L.ll
inlineasm-cnstrnt-bad-N.ll
inlineasm-cnstrnt-bad-O.ll
inlineasm-cnstrnt-bad-P.ll
inlineasm-cnstrnt-reg64.ll
inlineasm-cnstrnt-reg.ll
inlineasm-operand-code.ll
Mips specific inline asm operand modifier 'M':
2012-07-18 06:41:36 +00:00
inlineasmmemop.ll
Fix test cases.
2012-05-12 03:25:16 +00:00
internalfunc.ll
Fix test cases.
2012-05-12 03:25:16 +00:00
largeimm1.ll
largeimmprinting.ll
Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering and
2012-07-31 22:50:19 +00:00
lb1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
lbu1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
lh1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
lhu1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
lit.local.cfg
load-store-left-right.ll
Rename test/CodeGen/Mips/load-shift-left-right.ll.
2012-06-04 17:50:36 +00:00
longbranch.ll
Fix Mips long branch pass.
2012-07-21 03:30:44 +00:00
machineverifier.ll
Make machine verifier check the first instruction of the last bundle instead of
2012-06-14 20:51:13 +00:00
madd-msub.ll
memcpy.ll
Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.
2012-06-13 19:33:32 +00:00
mips64-fp-indexed-ls.ll
Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as
2012-07-31 18:16:49 +00:00
mips64countleading.ll
mips64directive.ll
mips64ext.ll
mips64extins.ll
mips64fpimm0.ll
mips64fpldst.ll
mips64imm.ll
mips64instrs.ll
mips64intldst.ll
mips64lea.ll
mips64load-store-left-right.ll
Add a test case for mips64 unaligned load/store instructions.
2012-06-04 17:57:06 +00:00
mips64muldiv.ll
mips64shift.ll
mipslopat.ll
neg1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
not1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
null.ll
1. fix null program output after some other changes
2012-06-21 20:39:10 +00:00
o32_cc_byval.ll
Eliminate the stack slot used to save the global base register.
2012-07-25 03:16:47 +00:00
o32_cc_vararg.ll
Set transient stack alignment in constructor of MipsFrameLowering and re-enable
2012-08-02 18:15:13 +00:00
o32_cc.ll
or1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
private.ll
ra-allocatable.ll
Make register Mips::RA allocatable if not in mips16 mode.
2012-07-10 00:19:06 +00:00
rdhwr-directives.ll
test case for r159770.
2012-07-05 19:29:31 +00:00
return_address.ll
Lower RETURNADDR node in Mips backend.
2012-07-11 00:53:32 +00:00
return-vector-float4.ll
Test case for r162008.
2012-08-16 03:48:41 +00:00
rotate.ll
sb1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
select.ll
selectcc.ll
Fix function select_cc_f32 in test/CodeGen/Mips/selectcc.ll.
2012-07-16 23:56:51 +00:00
sh1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
shift-parts.ll
sitofp-selectcc-opt.ll
Test case for r160036.
2012-07-11 19:50:46 +00:00
sll1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
sll2.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
small-section-reserve-gp.ll
Add register Mips::GP to the list of reserved registers if target is bare-metal
2012-08-22 03:18:13 +00:00
sra1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
sra2.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
srl1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
srl2.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
stacksize.ll
Test case for r159240.
2012-06-27 00:40:34 +00:00
sub1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
sub2.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
swzero.ll
Don't modify MO while use_iterator is still pointing to it.
2012-08-09 22:08:24 +00:00
tls-alias.ll
Add option disable-mips-delay-filler. Turn on mips' delay slot filler by
2012-08-22 02:51:28 +00:00
tls-models.ll
Extend the IL for selecting TLS models (PR9788)
2012-06-23 11:37:03 +00:00
tls.ll
Add option disable-mips-delay-filler. Turn on mips' delay slot filler by
2012-08-22 02:51:28 +00:00
unalignedload.ll
Fix test cases in test/CodeGen/Mips.
2012-06-02 00:05:45 +00:00
weak.ll
xor1.ll
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
2012-08-03 22:57:02 +00:00
zeroreg.ll
