llvm-6502/test/MC/Disassembler/Hexagon
2014-12-12 21:12:27 +00:00
..
alu32_alu.txt [Hexagon] Fixing broken tests. 2014-12-09 20:36:53 +00:00
alu32_perm.txt [Hexagon] Adding combine ri/ir instructions. 2014-12-10 22:23:07 +00:00
alu32_pred.txt [Hexagon] Fixing broken tests. 2014-12-09 20:36:53 +00:00
cr.txt [Hexagon] Adding any8, all8, and/or/xor/andn/orn/not predicate register forms, mask, and vitpack instructions and patterns. 2014-12-08 23:07:59 +00:00
j.txt [Hexagon] Adding J class call instructions. 2014-12-12 21:12:27 +00:00
jr.txt [Hexagon] Adding encodings for JR class instructions. Updating complier usages. 2014-12-10 21:24:10 +00:00
lit.local.cfg [Hexagon] Adding lit exception if Hexagon isn't built. 2014-12-04 04:28:38 +00:00
xtype_alu.txt [Hexagon] Adding encoding information for sign extend word instruction. 2014-12-11 16:43:06 +00:00
xtype_bit.txt [Hexagon] Adding xtype parity, min, minu, max, maxu instructions. 2014-12-08 21:19:18 +00:00
xtype_pred.txt [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings. 2014-12-09 18:16:49 +00:00