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3692081566
llvm-6502/test/CodeGen
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Juergen Ributzka 3692081566 [FastISel][AArch64] Teach the address computation to also fold sub instructions. 
Tiny enhancement to the address computation code to also fold sub instructions
if the rhs is constant and can be folded into the offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219186 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-07 03:40:03 +00:00
..
AArch64 [FastISel][AArch64] Teach the address computation to also fold sub instructions. 2014-10-07 03:40:03 +00:00
ARM Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
CPP
Generic Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Hexagon Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Inputs Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Mips Add fptrunc to mips fast-sel 2014-10-01 18:47:02 +00:00
MSP430 Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
NVPTX Revert r216862 due to a performance regression 2014-10-01 15:22:13 +00:00
PowerPC Fast-math fold: x / (y * sqrt(z)) -> x * (rsqrt(z) / y) 2014-10-06 19:31:18 +00:00
R600 R600/SI: Custom lower f64 -> i64 conversions 2014-10-03 23:54:56 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ
Thumb Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Thumb2 [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 2014-10-01 13:13:18 +00:00
X86 [DAGCombine] Remove SIGN_EXTEND-related inf-loop 2014-10-06 20:19:47 +00:00
XCore Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00