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Stepan Dyatkovskiy 37e5cfa4aa PR19320: 
The trouble as in ARMAsmParser, in ParseInstruction method. It assumes that ARM::R12 + 1 == ARM::SP.
It is wrong, since ARM::<Register> codes are generated by tablegen and actually could be any random numbers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205524 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 11:29:15 +00:00
autoconf ARM64: initial backend import 2014-03-29 10:18:08 +00:00
bindings
cmake ARM64: initial backend import 2014-03-29 10:18:08 +00:00
docs Stack map docs. Remove some stray markup. 2014-04-03 07:08:21 +00:00
examples
include Handle getting UnknownAddressOrSize or section_end(). 2014-04-03 03:57:03 +00:00
lib PR19320: 2014-04-03 11:29:15 +00:00
projects
test PR19320: 2014-04-03 11:29:15 +00:00
tools Revert "Fix a nomenclature error in llvm-nm." 2014-04-03 00:19:35 +00:00
unittests MCJIT: ensure that cygwin is identified properly 2014-03-31 23:42:23 +00:00
utils lit: Set a base directory for compiler-rt tests 2014-03-31 23:14:10 +00:00
.arcconfig
.clang-format
.gitignore
CMakeLists.txt Add ability to disable building LLVM utils 2014-04-02 22:49:58 +00:00
CODE_OWNERS.TXT ARM Linux support 2014-04-02 23:03:28 +00:00
configure ARM64: initial backend import 2014-03-29 10:18:08 +00:00
CREDITS.TXT
LICENSE.TXT
llvm.spec.in
LLVMBuild.txt
Makefile [configure/make] Propagate names of build host tools when making BuildTools 2014-03-25 21:45:41 +00:00
Makefile.common
Makefile.config.in
Makefile.rules
README.txt

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