6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-18 13:34:04 +00:00
Code Issues Projects Releases Wiki Activity
llvm-6502/test/CodeGen/X86
History
Bill Wendling d36d03bf2d Added a check so that if we have two machine instructions in this form 
MOV R0, R1
    MOV R1, R0

the second machine instruction is removed. Added a regression test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29792 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-21 07:33:33 +00:00
..
.cvsignore
Tired of wading through cvs's list ? files that are generated when building
2006-03-23 23:41:57 +00:00
2002-12-23-LocalRAProblem.llx
None of these tests should require a working lli, they are codegen tests,
2005-08-04 19:55:39 +00:00
2002-12-23-SubProblem.llx
None of these tests should require a working lli, they are codegen tests,
2005-08-04 19:55:39 +00:00
2003-08-03-CallArgLiveRanges.llx
None of these tests should require a working lli, they are codegen tests,
2005-08-04 19:55:39 +00:00
2003-08-23-DeadBlockTest.llx
…
2003-11-03-GlobalBool.llx
…
2004-02-12-Memcpy.llx
…
2004-02-13-FrameReturnAddress.llx
…
2004-02-14-InefficientStackPointer.llx
…
2004-02-22-Casts.llx
…
2004-03-30-Select-Max.llx
…
2004-04-09-SameValueCoalescing.llx
…
2004-04-13-FPCMOV-Crash.llx
…
2004-06-10-StackifierCrash.llx
…
2004-10-08-SelectSetCCFold.llx
…
2005-01-17-CycleInDAG.ll
remove dead flags
2005-08-19 01:14:40 +00:00
2005-02-14-IllegalAssembler.ll
…
2005-05-08-FPStackifierPHI.ll
…
2005-08-30-RegAllocAliasProblem.ll
Intel mode no longer uses %'s on registers
2006-05-01 05:56:51 +00:00
2005-12-03-IndirectTailCall.ll
Intel mode no longer uses %'s on registers
2006-05-01 05:56:51 +00:00
2006-01-19-ISelFoldingBug.ll
Added a load folding bug test case.
2006-01-20 01:12:23 +00:00
2006-01-30-LongSetcc.ll
new testcase for the 'C++' failures last night.
2006-01-30 22:43:10 +00:00
2006-03-01-InstrSchedBug.ll
Add a regression test for bug 478.
2006-03-02 21:48:34 +00:00
2006-03-02-InstrSchedBug.ll
Add another test case for instruction scheduling.
2006-03-03 18:58:09 +00:00
2006-04-04-CrossBlockCrash.ll
new testcase
2006-04-05 06:54:14 +00:00
2006-04-27-ISelFoldingBug.ll
Fix the test failure on non-Darwin targets.
2006-05-30 20:35:46 +00:00
2006-05-01-SchedCausingSpills.ll
A few instruction scheduling test cases.
2006-05-03 02:11:36 +00:00
2006-05-02-InstrSched1.ll
A few instruction scheduling test cases.
2006-05-03 02:11:36 +00:00
2006-05-02-InstrSched2.ll
Temporarily xfail this test, evan will look at it in a week or so.
2006-08-18 00:18:38 +00:00
2006-05-08-CoalesceSubRegClass.ll
Test case for PR770
2006-05-09 06:48:12 +00:00
2006-05-08-InstrSched.ll
New scheduling test case.
2006-05-12 01:59:17 +00:00
2006-05-11-InstrSched.ll
-sched-commute-nodes is now on by default.
2006-05-25 08:39:25 +00:00
2006-05-17-VectorArg.ll
New test case for vector type argument pass by value.
2006-05-17 20:20:04 +00:00
2006-05-22-FPSetEQ.ll
Added a test case for FP equality check.
2006-05-23 06:41:23 +00:00
2006-05-25-CycleInDAG.ll
New test case. x86 isel was creating a cycle in the DAG.
2006-05-25 20:21:19 +00:00
2006-07-10-InlineAsmAConstraint.ll
New testcase for PR825.
2006-07-11 02:52:37 +00:00
2006-07-12-InlineAsmQConstraint.ll
Testcase for PR828.
2006-07-12 16:59:09 +00:00
2006-07-19-ATTAsm.ll
Regression test for PR834.
2006-07-19 16:37:15 +00:00
2006-07-20-InlineAsm.ll
New testcase for PR833
2006-07-20 19:04:36 +00:00
2006-07-28-AsmPrint-Long-As-Pointer.ll
New testcase for PR853
2006-07-29 01:50:53 +00:00
2006-07-31-SingleRegClass.ll
New testcase for PR850.
2006-07-31 23:25:17 +00:00
2006-08-07-CycleInDAG.ll
New test case.
2006-08-07 23:58:47 +00:00
2006-08-16-CycleInDAG.ll
Another cyclic dag test case.
2006-08-17 00:00:46 +00:00
2006-08-21-ExtraMovInst.ll
Added a check so that if we have two machine instructions in this form
2006-08-21 07:33:33 +00:00
bswap.ll
X86 dag isel is now (soon) the default.
2006-01-27 21:15:22 +00:00
commute-two-addr.ll
…
compare_folding.llx
…
compare-add.ll
new testcase
2006-02-02 06:35:38 +00:00
dg.exp
Added the ability to xfail based on llvmgcc version
2006-04-12 21:57:40 +00:00
div_const.ll
Testcase for GCC bug28417, ensuring that we don't start getting it wrong
2006-07-30 17:46:37 +00:00
extend.ll
new testcase, each function should have one extension instr in it
2005-12-14 19:24:08 +00:00
fabs.ll
One of these xforms is only safe with unsafe math enabled.
2006-05-24 00:49:32 +00:00
fast-cc-callee-pops.ll
allow this to pass on non-x86 machines
2006-07-26 20:44:24 +00:00
fast-cc-merge-stack-adj.ll
Intel mode no longer uses %'s on registers
2006-05-01 05:56:51 +00:00
fast-cc-pass-in-regs.ll
Intel mode no longer uses %'s on registers
2006-05-01 05:56:51 +00:00
fast-cc-tail-call.ll
XFAIL tailcall test cases until it's implemented.
2006-01-27 21:13:27 +00:00
fildll.ll
These are fp stack test cases.
2006-01-27 21:14:23 +00:00
fp_constant_op.llx
Use Intel assembly syntax to look for ST
2006-01-27 22:51:51 +00:00
fp_load_cast_fold.llx
…
fp_load_fold.llx
Use Intel assembly syntax to look for ST
2006-01-27 22:51:51 +00:00
fp-immediate-shorten.ll
Also requires -mattr=-sse3
2006-03-15 18:05:13 +00:00
imul-lea.ll
New test case: use lea for imul by some constants.
2006-02-25 10:16:10 +00:00
inline-asm.ll
Add new testcase
2006-06-08 18:26:48 +00:00
isnan.llx
…
lea.ll
Add a lea instruction selection test case.
2006-05-30 06:53:55 +00:00
loop-strength-reduce.ll
Option -enable-x86-lsr has been removed
2006-03-20 18:26:11 +00:00
mul-shift-reassoc.ll
new testcase
2006-03-01 03:43:38 +00:00
negatize_zero.ll
Also requires -mattr=-sse3
2006-03-15 18:05:13 +00:00
overlap-add.ll
Intel mode no longer uses %'s on registers
2006-05-01 05:56:51 +00:00
overlap-shift.ll
Intel mode no longer uses %'s on registers
2006-05-01 05:56:51 +00:00
rdtsc.ll
This should not be dce'd
2005-11-20 21:46:52 +00:00
regpressure.ll
remove dead flags
2005-08-19 01:14:40 +00:00
rotate.ll
remove dead flags
2005-08-19 01:14:40 +00:00
select.ll
…
setuge.ll
Don't generate (or setp, setae) for SETUGE. Simply flip the operands around and
2006-01-30 23:39:40 +00:00
shift-double.llx
Fix a bug in the RUN line
2005-08-21 16:37:36 +00:00
shift-folding.ll
remove dead args
2005-08-19 01:17:18 +00:00
shift-one.ll
Add a test case for left shift by 1. We should not be using lea for this.
2006-02-28 23:57:45 +00:00
sse-load-ret.ll
new testcase for the 'ret double folding with load' opzn
2006-02-01 01:45:02 +00:00
store_op_load_fold2.ll
XFAIL for now.
2006-07-24 07:37:33 +00:00
store_op_load_fold.ll
weak globals on darwin require an extra load, breaking this test
2006-03-10 17:55:10 +00:00
store-fp-constant.ll
…
store-global-address.ll
New test case: use lea for imul by some constants.
2006-02-25 10:16:10 +00:00
unpcklps.ll
new testcase
2006-03-28 20:32:12 +00:00
vec_call.ll
Added a test case for parameter passing of vector values.
2006-05-30 20:37:00 +00:00
vec_clear.ll
Check for llc crash.
2006-04-21 01:21:23 +00:00
vec_extract.ll
Update vector extract test cases.
2006-05-31 00:48:09 +00:00
vec_ins_extract.ll
new testcase, not currently working.
2006-06-14 21:24:57 +00:00
vec_insert.ll
Add && to each RUN: line (except the last one).
2006-04-21 04:58:23 +00:00
vec_return.ll
New testcase
2006-04-17 20:32:27 +00:00
vec_select.ll
Add a vselect test case.
2006-04-10 07:30:13 +00:00
vec_set-2.ll
Add && to each RUN: line (except the last one).
2006-04-21 04:58:23 +00:00
vec_set-3.ll
Add && to each RUN: line (except the last one).
2006-04-21 04:58:23 +00:00
vec_set-4.ll
Add && to each RUN: line (except the last one).
2006-04-21 04:58:23 +00:00
vec_set-5.ll
Two more build_vector tests.
2006-04-22 06:19:11 +00:00
vec_set-6.ll
Two more build_vector tests.
2006-04-22 06:19:11 +00:00
vec_set-7.ll
Added a movq test case.
2006-04-24 23:03:22 +00:00
vec_set.ll
Add a BUILD_VECTOR with unpack and interleave testcase.
2006-03-25 09:48:14 +00:00
vec_shuffle-2.ll
Add && to each RUN: line (except the last one).
2006-04-21 04:58:23 +00:00
vec_shuffle-3.ll
Add && to each RUN: line (except the last one).
2006-04-21 04:58:23 +00:00
vec_shuffle-4.ll
Update. It should use two shufps, not three!
2006-04-28 18:55:34 +00:00
vec_shuffle-5.ll
Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when
2006-05-03 20:32:03 +00:00
vec_shuffle-6.ll
Fix a broken test.
2006-07-20 23:50:13 +00:00
vec_shuffle-7.ll
New vector shuffle test case.
2006-07-20 23:51:01 +00:00
vec_shuffle.ll
Update
2006-07-07 17:54:10 +00:00
vec_splat-2.ll
v16i8 splat with 2 punpcklbw and a single pshufd.
2006-04-20 09:05:16 +00:00
vec_splat.ll
movddup is a SSE3 instruction.
2006-04-21 16:42:47 +00:00
vec_zero.ll
Update test case.
2006-07-05 20:46:27 +00:00