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llvm-6502/test/MC
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Toma Tabacu 8204fb27ac [mips] [IAS] Add support for LAReg with identical source and destination register operands. 
Summary: In this case, we're supposed to load the immediate in AT and then ADDu it with the source register and put it in the destination register.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9367

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240278 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 13:10:23 +00:00
..
AArch64 Improve the --expand-relocs handling of MachO. 2015-06-18 22:38:20 +00:00
AMDGPU R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
ARM Revert 240130, it caused crashes (repro in PR23900). 2015-06-19 23:43:47 +00:00
AsmParser
COFF
Disassembler
ELF Revert 240130, it caused crashes (repro in PR23900). 2015-06-19 23:43:47 +00:00
Hexagon
MachO Revert 240130, it caused crashes (repro in PR23900). 2015-06-19 23:43:47 +00:00
Markup
Mips [mips] [IAS] Add support for LAReg with identical source and destination register operands. 2015-06-22 13:10:23 +00:00
PowerPC Properly handle the mftb instruction. 2015-06-16 16:01:15 +00:00
Sparc Revert 240130, it caused crashes (repro in PR23900). 2015-06-19 23:43:47 +00:00
SystemZ
X86 AVX-512: added VPSHUFB instruction - all SKX forms 2015-06-22 13:00:42 +00:00