Evan Cheng bae20a6353 tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77305 91177308-0d34-0410-b5e6-96231b3b80d8		2009-07-28 07:38:35 +00:00
..
2007-01-31-RegInfoAssert.ll
2007-02-02-JoinIntervalsCrash.ll
2007-03-06-AddR7.ll
2007-05-05-InvalidPushPop.ll
2009-06-18-ThumbCommuteMul.ll
2009-07-19-SPDecBug.ll	Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.	2009-07-20 19:47:55 +00:00
2009-07-20-TwoAddrBug.ll	Use TII->findCommutedOpIndices to find the commute operands (rather than guessing).	2009-07-20 21:16:08 +00:00
2009-07-27-PEIAssert.ll	tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.	2009-07-28 07:38:35 +00:00
asmprinter-bug.ll	Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb.	2009-07-20 06:10:07 +00:00
dg.exp
dyn-stackalloc.ll
fpconv.ll
fpow.ll
frame_thumb.ll
iabs.ll
inlineasm-imm-thumb.ll
ispositive.ll	Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically.	2009-07-11 06:43:01 +00:00
large-stack.ll
ldr_ext.ll	Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible.	2009-07-11 07:08:13 +00:00
ldr_frame.ll	Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically.	2009-07-11 06:43:01 +00:00
long_shift.ll	Add missing tests.	2009-07-07 20:38:08 +00:00
long-setcc.ll
long.ll
mul.ll	Add missing tests.	2009-07-07 20:38:08 +00:00
select.ll
stack-frame.ll
thumb-imm.ll
tst_teq.ll
unord.ll
vargs.ll