Zoran Jovanovic 627c5342b2 [mips][microMIPS] Implement SLL and NOP instructions ... http://reviews.llvm.org/D10474 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241150 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-01 09:54:51 +00:00
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AArch64
ARM
Hexagon	[Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.	2015-06-10 16:52:32 +00:00
Mips	[mips][microMIPS] Implement SLL and NOP instructions	2015-07-01 09:54:51 +00:00
PowerPC	[PPC] Implement vmrgew and vmrgow instructions	2015-06-25 15:17:40 +00:00
Sparc
SystemZ
X86	[X86]: Correctly sign-extend 16-bit immediate in CALL instruction.	2015-06-26 16:58:59 +00:00
XCore