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llvm-6502/lib/Target/IA64
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David Greene 8ad4c00c00 Have TableGen emit setSubgraphColor calls under control of a -gen-debug 
flag.  Then in a debugger developers can set breakpoints at these calls
to see waht is about to be selected and what the resulting subgraph
looks like.  This really helps when debugging instruction selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58278 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27 21:56:29 +00:00
..
CMakeLists.txt CMake: Builds all targets. 2008-09-26 04:40:32 +00:00
IA64.h Use raw_ostream throughout the AsmPrinter. 2008-08-21 00:14:44 +00:00
IA64.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64AsmPrinter.cpp Switch the MachineOperand accessors back to the short names like 2008-10-03 15:45:36 +00:00
IA64Bundling.cpp Switch the MachineOperand accessors back to the short names like 2008-10-03 15:45:36 +00:00
IA64InstrBuilder.h Fix constant pool loads, and remove broken versions of addConstantPoolReference. 2008-09-06 01:11:01 +00:00
IA64InstrFormats.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64InstrInfo.cpp Switch the MachineOperand accessors back to the short names like 2008-10-03 15:45:36 +00:00
IA64InstrInfo.h Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested 2008-08-26 18:03:31 +00:00
IA64InstrInfo.td Rename ConstantSDNode::getValue to getZExtValue, for consistency 2008-09-12 16:56:44 +00:00
IA64ISelDAGToDAG.cpp Have TableGen emit setSubgraphColor calls under control of a -gen-debug 2008-10-27 21:56:29 +00:00
IA64ISelLowering.cpp Rename LoadX to LoadExt. 2008-10-14 21:26:46 +00:00
IA64ISelLowering.h Add "inreg" field to CallSDNode (doesn't increase 2008-09-26 19:31:26 +00:00
IA64MachineFunctionInfo.h Remove trailing whitespace 2005-04-21 23:13:11 +00:00
IA64RegisterInfo.cpp Switch the MachineOperand accessors back to the short names like 2008-10-03 15:45:36 +00:00
IA64RegisterInfo.h Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. 2008-03-31 20:40:39 +00:00
IA64RegisterInfo.td make sure ar.pfs is in a register class, this fixes test/CodeGen/IA64/ret-0.ll 2008-03-09 20:12:44 +00:00
IA64TargetAsmInfo.cpp Switch IA64 to new section-handling stuff 2008-08-07 09:52:35 +00:00
IA64TargetAsmInfo.h Switch IA64 to new section-handling stuff 2008-08-07 09:52:35 +00:00
IA64TargetMachine.cpp mark some targets as experimental. Andrew, if you think that Alpha is 2008-10-16 06:16:50 +00:00
IA64TargetMachine.h Use raw_ostream throughout the AsmPrinter. 2008-08-21 00:14:44 +00:00
Makefile remove attribution from lib Makefiles. 2007-12-29 20:09:26 +00:00
README Stuff noticed while grepping code 2008-02-11 23:47:56 +00:00

README 

TODO:
  - Un-bitrot ISel
  - Hook up If-Conversion a la ARM target
  - Hook up all branch analysis functions
  - Instruction scheduling
  - Bundling
  - Dynamic Optimization
  - Testing and bugfixing
  - stop passing FP args in both FP *and* integer regs when not required
  - allocate low (nonstacked) registers more aggressively
  - clean up and thoroughly test the isel patterns.
  - fix stacked register allocation order: (for readability) we don't want
    the out? registers being the first ones used
  - fix up floating point
    (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
  - bundling!
    (we will avoid the mess that is:
     http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
  - instruction scheduling (hmmmm! ;)
  - counted loop support
  - make integer + FP mul/div more clever (we have fixed pseudocode atm)
  - track and use comparison complements

INFO:
  - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
    don't need to worry about this.
  - i have instruction scheduling/bundling pseudocode, that really works
    (has been tested, albeit at the perl-script level).
    so, before you go write your own, send me an email!

KNOWN DEFECTS AT THE CURRENT TIME:
  - C++ vtables contain naked function pointers, not function descriptors,
  which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
  - varargs are broken
  - alloca doesn't work (indeed, stack frame layout is bogus)
  - no support for big-endian environments
  - (not really the backend, but...) the CFE has some issues on IA64.
    these will probably be fixed soon.
  
ACKNOWLEDGEMENTS:
  - Chris Lattner (x100)
  - Other LLVM developers ("hey, that looks familiar")

CONTACT:
  - You can email me at duraid@octopus.com.au. If you find a small bug,
    just email me. If you find a big bug, please file a bug report
    in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
    things LLVM.