llvm-6502/test/MC/Mips/mips64r2
Daniel Sanders 68de93c3b4 [mips] Add synci instruction.
Patch by Amaury Pouly

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6421


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222899 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 17:28:10 +00:00
..
abi-bad.s Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. 2014-07-08 08:59:22 +00:00
abiflags.s [mips] Add MipsOptionRecord abstraction and use it to implement .reginfo/.MIPS.options 2014-07-21 13:30:55 +00:00
invalid.s [mips] Move CHECK lines to the same line as the instruction it's testing 2014-06-12 09:50:17 +00:00
valid-xfail.s [mips] Add synci instruction. 2014-11-27 17:28:10 +00:00
valid.s Recommit "[mips] Add names and tests for the hardware registers" 2014-11-11 10:31:31 +00:00