Ahmed Bougacha d4b59dcdba [TableGen][AsmMatcherEmitter] Only parse isolated tokens as registers. ... Fixes PR23455, where, when TableGen generates the matcher from the AsmString, it splits "cmp${cc}ss" into tokens, and the "ss" suffix is recognized as the SS register. I can't think of a situation where that's a feature, not a bug, hence: when a token is "isolated", i.e., it is followed and preceded by separators, it shouldn't be parsed as a register. Differential Revision: http://reviews.llvm.org/D9844 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238536 91177308-0d34-0410-b5e6-96231b3b80d8		2015-05-29 01:03:37 +00:00
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AArch64
ARM	Don't special case undefined symbol when deciding the symbol order.	2015-05-28 21:59:34 +00:00
AsmParser
COFF	Revise test to run llc and llvm-mc separately.	2015-05-28 21:49:50 +00:00
Disassembler	[mips][microMIPSr6] Implement SEB and SEH instructions	2015-05-27 15:39:47 +00:00
ELF	Don't special case undefined symbol when deciding the symbol order.	2015-05-28 21:59:34 +00:00
Hexagon	Expand MUX instructions early on Hexagon	2015-03-31 13:35:12 +00:00
MachO
Markup
Mips	[mips] Add new format for dmtc2/dmfc2 for Octeon CPUs.	2015-05-28 16:23:16 +00:00
PowerPC	This patch adds support for the vector quadword add/sub instructions introduced	2015-05-25 15:49:26 +00:00
R600	R600/SI: Add assembler support for all CI and VI VOP2 instructions	2015-05-26 15:55:52 +00:00
Sparc
SystemZ
X86	[TableGen][AsmMatcherEmitter] Only parse isolated tokens as registers.	2015-05-29 01:03:37 +00:00