llvm-6502/test/CodeGen/XCore/store.ll
Richard Osborne 1d05b237a5 Fix pattern for LD16S_3r, add basic tests to check load / store instructions
are being properly selected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75797 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 17:06:59 +00:00

36 lines
847 B
LLVM

; RUN: llvm-as < %s | llc -march=xcore > %t1.s
; RUN: not grep add %t1.s
; RUN: not grep ldaw %t1.s
; RUN: not grep lda16 %t1.s
; RUN: grep "stw" %t1.s | count 2
; RUN: grep "st16" %t1.s | count 1
; RUN: grep "st8" %t1.s | count 1
define void @store32(i32* %p, i32 %offset, i32 %val) nounwind {
entry:
%0 = getelementptr i32* %p, i32 %offset
store i32 %val, i32* %0, align 4
ret void
}
define void @store32_imm(i32* %p, i32 %val) nounwind {
entry:
%0 = getelementptr i32* %p, i32 11
store i32 %val, i32* %0, align 4
ret void
}
define void @store16(i16* %p, i32 %offset, i16 %val) nounwind {
entry:
%0 = getelementptr i16* %p, i32 %offset
store i16 %val, i16* %0, align 2
ret void
}
define void @store8(i8* %p, i32 %offset, i8 %val) nounwind {
entry:
%0 = getelementptr i8* %p, i32 %offset
store i8 %val, i8* %0, align 1
ret void
}