Dan Gohman 2a5431e004 Don't check for comments, which vary between subtargets. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96434 91177308-0d34-0410-b5e6-96231b3b80d8		2010-02-17 01:08:57 +00:00
..
Alpha
ARM	Fix pr6111: Avoid using the LR register for the target address of an indirect	2010-02-16 17:24:15 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic	Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there	2010-02-15 22:35:59 +00:00
Mips
MSP430
PIC16
PowerPC	Make g5 target explicit; scheduling affects register choice.	2010-02-16 23:25:23 +00:00
SPARC
SystemZ
Thumb
Thumb2	Last week we were generating code with duplicate induction variables in this	2010-02-15 21:56:40 +00:00
X86	Don't check for comments, which vary between subtargets.	2010-02-17 01:08:57 +00:00
XCore