Nemanja Ivanovic 8493722975 Add support for VSX FMA single-precision instructions to the PPC back end ... This patch corresponds to review: http://reviews.llvm.org/D9941 It adds the various FMA instructions introduced in the version 2.07 of the ISA along with the testing for them. These are operations on single precision scalar values in VSX registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238578 91177308-0d34-0410-b5e6-96231b3b80d8		2015-05-29 17:13:25 +00:00
..
AArch64	[AArch64] Clean up the ELF streamer a bit.	2015-05-23 16:39:10 +00:00
ARM	Don't special case undefined symbol when deciding the symbol order.	2015-05-28 21:59:34 +00:00
AsmParser	Relax these tests a bit.	2015-05-22 21:37:13 +00:00
COFF	Revise test to run llc and llvm-mc separately.	2015-05-28 21:49:50 +00:00
Disassembler	Add support for VSX FMA single-precision instructions to the PPC back end	2015-05-29 17:13:25 +00:00
ELF	Don't special case undefined symbol when deciding the symbol order.	2015-05-28 21:59:34 +00:00
Hexagon	[Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch.	2015-05-29 14:44:13 +00:00
MachO	AArch64: work around ld64 bug more aggressively.	2015-05-18 22:07:20 +00:00
Markup
Mips	[mips] Add new format for dmtc2/dmfc2 for Octeon CPUs.	2015-05-28 16:23:16 +00:00
PowerPC	Add support for VSX FMA single-precision instructions to the PPC back end	2015-05-29 17:13:25 +00:00
R600	R600/SI: Add assembler support for all CI and VI VOP2 instructions	2015-05-26 15:55:52 +00:00
Sparc	Sparc: support the "set" synthetic instruction.	2015-05-18 16:43:33 +00:00
SystemZ	[SystemZ] Add z13 vector facility and MC support	2015-05-05 19:23:40 +00:00
X86	[TableGen][AsmMatcherEmitter] Only parse isolated tokens as registers.	2015-05-29 01:03:37 +00:00