llvm-6502/include/llvm/Target
Bob Wilson f0e1b89421 Edit and clarify comments for TargetInstrInfo methods:
None of the existing implementations of commuteInstruction create new
instructions unless the NewMI parameter is true, but the comment had
implied otherwise.

findCommutedOpIndices returns false, not true, when it doesn't know
how to commute the instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 16:48:26 +00:00
..
Mangler.h give Mangler access to TargetData. 2010-03-12 20:47:28 +00:00
SubtargetFeature.h The getDefaultSubtargetFeatures method of SubtargetFeature did actually return a 2010-05-11 00:30:02 +00:00
Target.td Remove isTwoAddress from llvm. 2010-06-21 20:35:09 +00:00
TargetAsmBackend.h MC: Change RelaxInstruction to only take the input and output instructions. 2010-05-26 18:15:06 +00:00
TargetAsmLexer.h
TargetAsmParser.h Fix various doxygen warnings. 2010-02-22 04:10:52 +00:00
TargetCallingConv.td
TargetData.h Revert r97064. Duncan pointed out that bitcasts are defined in 2010-02-25 15:20:39 +00:00
TargetELFWriterInfo.h
TargetFrameInfo.h
TargetInstrDesc.h Start TargetRegisterClass indices at 0 instead of 1, so that 2010-06-18 18:13:55 +00:00
TargetInstrInfo.h Edit and clarify comments for TargetInstrInfo methods: 2010-06-24 16:48:26 +00:00
TargetInstrItineraries.h declare a class with 'class' instead of struct to avoid tag mismatch 2010-06-12 15:46:56 +00:00
TargetIntrinsicInfo.h
TargetJITInfo.h
TargetLowering.h Reapply r106634, now that the bug it exposed is fixed. 2010-06-24 14:30:44 +00:00
TargetLoweringObjectFile.h Add a new section and accessor for TLS data. 2010-05-22 00:00:58 +00:00
TargetMachine.h MC: Add TargetMachine support for setting the value of MCRelaxAll with 2010-05-26 21:48:55 +00:00
TargetOpcodes.h - Fix description of SUBREG_TO_REG. It's not going to generate a zext. But it 2010-06-09 18:15:36 +00:00
TargetOptions.h Remove the -enable-sjlj-eh option, which doesn't do anything. 2010-05-02 15:36:26 +00:00
TargetRegisterInfo.h Start TargetRegisterClass indices at 0 instead of 1, so that 2010-06-18 18:13:55 +00:00
TargetRegistry.h Currently, createMachOStreamer() is invoked directly in llvm-mc which 2010-05-21 12:54:43 +00:00
TargetSchedule.td Make processor FUs unique for given itinerary. This extends the limit of 32 2010-04-18 20:31:01 +00:00
TargetSelect.h
TargetSelectionDAG.td finally remove the immAllOnesV_bc/immAllZerosV_bc patterns 2010-03-28 08:43:23 +00:00
TargetSelectionDAGInfo.h Fix a comment. 2010-05-11 18:03:41 +00:00
TargetSubtarget.h