Nadav Rotem 1147248e6f [VECTOR-SELECT] Address one of the bugs in pr10902. ... Vector SetCC result types need to be type-legalized. This code worked before because scalar result types are known to be legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140249 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-21 14:34:38 +00:00
..
CMakeLists.txt	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
DAGCombiner.cpp	Add a DAGCombine for subvector extracts to remove useless chains of	2011-09-20 23:19:33 +00:00
FastISel.cpp	Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges.	2011-09-08 22:59:09 +00:00
FunctionLoweringInfo.cpp	Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges.	2011-09-08 22:59:09 +00:00
InstrEmitter.cpp	Lower ARM adds/subs to add/sub after adding optional CPSR operand.	2011-09-21 02:20:46 +00:00
InstrEmitter.h	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	2011-06-28 19:10:37 +00:00
LegalizeDAG.cpp	Some legalization fixes for atomic load and store.	2011-09-15 21:20:49 +00:00
LegalizeFloatTypes.cpp	Misc cleanup; addresses Duncan's comments on r138877.	2011-08-31 20:13:26 +00:00
LegalizeIntegerTypes.cpp	[VECTOR-SELECT] Address one of the bugs in pr10902.	2011-09-21 14:34:38 +00:00
LegalizeTypes.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
LegalizeTypes.h	Some legalization fixes for atomic load and store.	2011-09-15 21:20:49 +00:00
LegalizeTypesGeneric.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
LegalizeVectorOps.cpp	white space cleanups	2011-09-18 10:29:29 +00:00
LegalizeVectorTypes.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
Makefile
ScheduleDAGFast.cpp	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	2011-06-28 19:10:37 +00:00
ScheduleDAGList.cpp	Various bits of framework needed for precise machine-level selection	2010-12-24 05:03:26 +00:00
ScheduleDAGRRList.cpp	PreRA scheduler should avoid cloning compares.	2011-09-01 00:54:31 +00:00
ScheduleDAGSDNodes.cpp	Rename TargetSubtarget to TargetSubtargetInfo for consistency.	2011-07-01 21:01:15 +00:00
ScheduleDAGSDNodes.h	The index stored in the RegDefIter is one after the current index. When getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped.	2011-06-27 18:34:12 +00:00
SDNodeDbgValue.h	Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.	2011-02-18 22:43:42 +00:00
SDNodeOrdering.h
SelectionDAG.cpp	Add vselect target support for targets that do not support blend but do support	2011-09-13 19:17:42 +00:00
SelectionDAGBuilder.cpp	Fix check for unaligned load/store so it doesn't catch over-aligned load/store.	2011-09-13 22:19:59 +00:00
SelectionDAGBuilder.h	Basic x86 code generation for atomic load and store instructions.	2011-08-24 20:50:09 +00:00
SelectionDAGISel.cpp	Lower ARM adds/subs to add/sub after adding optional CPSR operand.	2011-09-21 02:20:46 +00:00
SelectionDAGPrinter.cpp	Pass the graph to the DOTGraphTraits.getEdgeAttributes().	2011-02-27 04:11:03 +00:00
TargetLowering.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
TargetSelectionDAGInfo.cpp	Implement a bunch more TargetSelectionDAGInfo infrastructure.	2010-05-11 17:31:57 +00:00