llvm-6502/test/CodeGen
Jiangning Liu 3cd73a5ded [AArch64] Fix some failures exposed by value type v4f16 and v8f16.
1) Add some missing bitcast patterns for v8f16.
2) Add type promotion for operand of ld/st operations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 01:31:42 +00:00
..
AArch64 [AArch64] Fix some failures exposed by value type v4f16 and v8f16. 2014-08-29 01:31:42 +00:00
ARM ARM: Add patterns for dbg 2014-08-26 12:47:26 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Don't use odd-numbered float registers for double arguments for fastcc 2014-08-22 09:23:22 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Add support for dcbtst and icbt (prefetch) 2014-08-23 23:21:04 +00:00
R600 R600/SI: Use READ2/WRITE2 instructions for 64-bit mem ops with 32-bit alignment 2014-08-22 18:49:35 +00:00
SPARC
SystemZ
Thumb ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
Thumb2 ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
X86 On MachO, don't put non-private constants in mergeable sections. 2014-08-28 20:13:31 +00:00
XCore