Jim Grosbach f6713916fb ARM push of a single register encodes as pre-indexed STR. ... Per the ARM ARM, a 'push' of a single register encodes as an STR, not an STM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8		2011-08-11 18:07:11 +00:00
..
Alpha
ARM	ARM push of a single register encodes as pre-indexed STR.	2011-08-11 18:07:11 +00:00
Blackfin	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CBackend	Revert r137134. It breaks some code as Eli pointed out.	2011-08-09 18:56:35 +00:00
CellSPU
CPP
Generic	Comment correction.	2011-07-12 03:39:22 +00:00
MBlaze
Mips	Lower memory barriers to sync instructions.	2011-07-19 23:30:50 +00:00
MSP430
PowerPC	Add MCObjectFileInfo and sink the MCSections initialization code from	2011-07-20 05:58:47 +00:00
PTX	PTX: Add initial support for device function calls	2011-08-09 17:36:31 +00:00
SPARC
SystemZ
Thumb	Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.	2011-07-07 03:55:05 +00:00
Thumb2	Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611.	2011-08-08 19:49:37 +00:00
X86	[AVX] If the data which is going to be saved is already in two XMM registers	2011-08-11 16:41:21 +00:00
XCore	Fix crash with varargs function with no named parameters.	2011-08-01 16:45:59 +00:00