Pawel Wodnicki 97b07299fa Merging r167855 into 3.2 relase branch ...

Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.

This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@168334 91177308-0d34-0410-b5e6-96231b3b80d8

2012-11-19 22:17:54 +00:00

23 KiB

Raw Blame History

View Raw