llvm-6502/lib/Target/Mips/Mips16RegisterInfo.h
Akira Hatanaka 1ebe5fce8e [mips] 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171515 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-04 19:38:05 +00:00

53 lines
1.8 KiB
C++

//===-- Mips16RegisterInfo.h - Mips16 Register Information ------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the Mips16 implementation of the TargetRegisterInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef MIPS16REGISTERINFO_H
#define MIPS16REGISTERINFO_H
#include "MipsRegisterInfo.h"
namespace llvm {
class Mips16InstrInfo;
class Mips16RegisterInfo : public MipsRegisterInfo {
const Mips16InstrInfo &TII;
public:
Mips16RegisterInfo(const MipsSubtarget &Subtarget,
const Mips16InstrInfo &TII);
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
bool requiresRegisterScavenging(const MachineFunction &MF) const;
bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
bool useFPForScavengingIndex(const MachineFunction &MF) const;
bool saveScavengerRegister(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
MachineBasicBlock::iterator &UseMI,
const TargetRegisterClass *RC,
unsigned Reg) const;
private:
virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
int FrameIndex, uint64_t StackSize,
int64_t SPOffset) const;
};
} // end namespace llvm
#endif