Simon Pilgrim 3f6acdd265 [X86][SSE] Missing SSE/AVX1 memory folding integer instructions ...

Added most of the missing integer vector folding patterns for SSE (to SSE42) and AVX1.

The most useful of these are probably the i32/i64 extraction, i8/i16/i32/i64 insertions, zero/sign extension, unsigned saturation subtractions, i64 subtractions and the variable mask blends (pblendvb) - others include CLMUL, SSE42 string comparisons and bit tests.

Differential Revision: http://reviews.llvm.org/D7094



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226745 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-21 23:43:30 +00:00

..

AArch64

DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))

2015-01-21 23:17:19 +00:00

ARM

Fix load-store optimizer on thumbv4t

2015-01-21 22:39:43 +00:00

CPP

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Generic

getMangledTypeStr: clarify how it mangles types, and add tests

2015-01-14 23:05:17 +00:00

Hexagon

[Hexagon] Converting multiply and accumulate with immediate intrinsics to patterns.

2015-01-21 18:13:15 +00:00

Inputs

IR: Move MDLocation into place

2015-01-14 22:27:36 +00:00

Mips

[mips] Add registers and ALL check prefix to octeon test case.

2015-01-20 16:14:02 +00:00

MSP430

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NVPTX

Check that the TLI callback enableAggressiveFMAFusion has the desired effect on FMA folding.

2015-01-14 15:36:28 +00:00

PowerPC

[PowerPC] Add r2 as an operand for all calls under both PPC64 ELF V1 and V2

2015-01-19 07:20:27 +00:00

R600

DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))

2015-01-21 23:17:19 +00:00

SPARC

Use the integrated assembler by default on SPARC.

2015-01-14 07:53:39 +00:00

SystemZ

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Thumb

IR: Move MDLocation into place

2015-01-14 22:27:36 +00:00

Thumb2

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X86

[X86][SSE] Missing SSE/AVX1 memory folding integer instructions

2015-01-21 23:43:30 +00:00

XCore

IR: Move MDLocation into place

2015-01-14 22:27:36 +00:00