llvm-6502/test/CodeGen
Evan Cheng 400073d546 On recent Intel u-arch's, folding loads into some unary SSE instructions can
be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.

movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0

instead of
cvtss2sd (%rdi), %xmm0

An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 07:40:29 +00:00
..
Alpha Eliminate more uses of llvm-as and llvm-dis. 2009-09-09 00:09:15 +00:00
ARM Handle ARM inline asm "w" constraints with 64-bit ("d") registers. 2009-12-18 01:03:29 +00:00
Blackfin Move Blackfin intrinsics into the Target/Blackfin directory. 2009-10-15 18:50:52 +00:00
CBackend Eliminate more uses of llvm-as and llvm-dis. 2009-09-09 00:09:15 +00:00
CellSPU Revert this dag combine change: 2009-12-17 00:40:05 +00:00
CPP fix PR5295 where the .ll parser didn't reject a function after a global 2009-10-25 23:22:50 +00:00
Generic While this test is testing a problem in the generic part of codegen, 2009-11-27 16:04:14 +00:00
Mips Support PIC loading of constant pool entries 2009-11-25 12:17:58 +00:00
MSP430 Lower setcc branchless, if this is profitable. 2009-12-11 23:01:29 +00:00
PIC16 While this test is testing a problem in the generic part of codegen, 2009-11-27 16:04:14 +00:00
PowerPC Do better with physical reg operands (typically, from inline asm) 2009-12-16 00:29:41 +00:00
SPARC Eliminate some redundant llvm-as calls. 2009-10-12 09:31:55 +00:00
SystemZ Eliminate more uses of llvm-as and llvm-dis. 2009-09-09 00:09:15 +00:00
Thumb Add test case for the phi reuse patch. 2009-12-18 00:11:44 +00:00
Thumb2 Make this test pass on Linux. 2009-12-16 07:35:25 +00:00
X86 On recent Intel u-arch's, folding loads into some unary SSE instructions can 2009-12-18 07:40:29 +00:00
XCore Add XCore support for indirectbr / blockaddress. 2009-11-18 23:20:42 +00:00