Chandler Carruth dc58d1e099 [x86] Fully generalize the zext lowering in the new vector shuffle ... lowering to support both anyext and zext and to custom lower for many different microarchitectures. Using this allows us to get *exactly* the right code for zext and anyext shuffles in all the vector sizes. For v16i8, the improvement is *huge*. The new SSE2 test case added I refused to add before this because it was sooooo muny instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218143 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-19 20:00:32 +00:00
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AArch64	Optimize sext/zext insertion algorithm in back-end.	2014-09-19 05:30:35 +00:00
ARM	[ARM] Do not perform a tail call when the caller returns several values.	2014-09-18 21:17:50 +00:00
CPP
Generic	Add a regression test to sanity check the PBQP allocator.	2014-09-03 18:04:10 +00:00
Hexagon
Inputs
Mips	Add mips32 r1 to the list of supported targets for Mips fast-isel	2014-09-15 20:30:25 +00:00
MSP430	Drop the W postfix on the 16-bit registers.	2014-09-10 06:58:14 +00:00
NVPTX	[MachineSink] Use the real post dominator tree	2014-09-01 03:47:25 +00:00
PowerPC	Optionally enable more-aggressive FMA formation in DAGCombine	2014-09-19 11:42:56 +00:00
R600	R600/SI: Fix test to prepare for scheduler	2014-09-19 18:11:16 +00:00
SPARC	Add back tests for empty function in SPARC and PowerPC.	2014-09-15 22:11:07 +00:00
SystemZ
Thumb	Check-label a bit more specific	2014-09-03 13:32:08 +00:00
Thumb2	ARM / x86_64 varargs: Don't save regparms in prologue without va_start	2014-08-22 21:59:26 +00:00
X86	[x86] Fully generalize the zext lowering in the new vector shuffle	2014-09-19 20:00:32 +00:00
XCore