llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-31 10:34:17 +00:00

History

Chris Lattner 402504b1ba Vectors that are known live-in and live-out are clearly already marked in

the vrsave register for the caller.  This allows us to codegen a function as:

_test_rol:
        mfspr r2, 256
        mr r3, r2
        mtspr 256, r3
        vspltisw v2, -12
        vrlw v2, v2, v2
        mtspr 256, r2
        blr

instead of:

_test_rol:
        mfspr r2, 256
        oris r3, r2, 40960
        mtspr 256, r3
        vspltisw v0, -12
        vrlw v2, v0, v0
        mtspr 256, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27772 91177308-0d34-0410-b5e6-96231b3b80d8

2006-04-17 21:22:06 +00:00

Analysis

Implement value #'ing for vector operations, implementing

2006-04-14 05:10:20 +00:00