Nate Begeman 405e3ecb56 Invert the TargetLowering flag that controls divide by consant expansion. ... Add a new flag to TargetLowering indicating if the target has really cheap signed division by powers of two, make ppc use it. This will probably go away in the future. Implement some more ISD::SDIV folds in the dag combiner Remove now dead code in the x86 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8		2005-10-21 00:02:42 +00:00
..
.cvsignore
Makefile
X86.h	Remove the X86 and PowerPC Simple instruction selectors; their time has	2005-08-18 23:53:15 +00:00
X86.td
X86AsmPrinter.cpp
X86AsmPrinter.h
X86ATTAsmPrinter.cpp
X86ATTAsmPrinter.h
X86CodeEmitter.cpp
X86ELFWriter.cpp
X86FloatingPoint.cpp	Adjust to new livevars interface	2005-08-23 23:41:14 +00:00
X86InstrBuilder.h
X86InstrInfo.cpp	Properly split f32 and f64 into separate register classes for scalar sse fp	2005-10-14 22:06:00 +00:00
X86InstrInfo.h
X86InstrInfo.td	Properly split f32 and f64 into separate register classes for scalar sse fp	2005-10-14 22:06:00 +00:00
X86IntelAsmPrinter.cpp
X86IntelAsmPrinter.h
X86ISelPattern.cpp	Invert the TargetLowering flag that controls divide by consant expansion.	2005-10-21 00:02:42 +00:00
X86JITInfo.cpp
X86JITInfo.h
X86PeepholeOpt.cpp
X86RegisterInfo.cpp	Properly split f32 and f64 into separate register classes for scalar sse fp	2005-10-14 22:06:00 +00:00
X86RegisterInfo.h	Pass extra regclasses into spilling code	2005-09-30 01:29:42 +00:00
X86RegisterInfo.td	Properly split f32 and f64 into separate register classes for scalar sse fp	2005-10-14 22:06:00 +00:00
X86Relocations.h
X86Subtarget.cpp	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00
X86Subtarget.h	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00
X86TargetMachine.cpp	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00
X86TargetMachine.h	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00