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1cd1b0b283
This cleans up after the mess r108567 left in the CellSPU backend. ORCvt-instruction were used to reinterpret registers, and the ORs were then removed by isMoveInstr(). This patch now removes 350 instrucions of format: or $3, $3, $3 (from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is checked for. Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114074 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
useful-harnesses | ||
2009-01-01-BrCond.ll | ||
2010-04-07-DbgValueOtherTargets.ll | ||
and_ops.ll | ||
arg_ret.ll | ||
bigstack.ll | ||
bss.ll | ||
call_indirect.ll | ||
call.ll | ||
crash.ll | ||
ctpop.ll | ||
dg.exp | ||
dp_farith.ll | ||
eqv.ll | ||
extract_elt.ll | ||
fcmp32.ll | ||
fcmp64.ll | ||
fdiv.ll | ||
fneg-fabs.ll | ||
i8ops.ll | ||
i64ops.ll | ||
icmp8.ll | ||
icmp16.ll | ||
icmp32.ll | ||
icmp64.ll | ||
immed16.ll | ||
immed32.ll | ||
immed64.ll | ||
int2fp.ll | ||
intrinsics_branch.ll | ||
intrinsics_float.ll | ||
intrinsics_logical.ll | ||
jumptable.ll | ||
loads.ll | ||
mul_ops.ll | ||
mul-with-overflow.ll | ||
nand.ll | ||
or_ops.ll | ||
private.ll | ||
rotate_ops.ll | ||
select_bits.ll | ||
sext128.ll | ||
shift_ops.ll | ||
shuffles.ll | ||
sp_farith.ll | ||
stores.ll | ||
storestruct.ll | ||
struct_1.ll | ||
sub_ops.ll | ||
trunc.ll | ||
v2f32.ll | ||
v2i32.ll | ||
vec_const.ll | ||
vecinsert.ll |