mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-21 08:17:40 +00:00
Simon Pilgrim
6970be03d1
This patch adds vectorization support for uniform constant i64 arithmetic shift right operators. Differential Revision: http://reviews.llvm.org/D9645 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241514 91177308-0d34-0410-b5e6-96231b3b80d8
14 lines
396 B
LLVM
14 lines
396 B
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse4.2 | FileCheck %s
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; CHECK: psllq $48, %xmm0
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; CHECK: psrad $16, %xmm0
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; CHECK: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
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; sign extension v2i16 to v2i32
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define void @convert(<2 x i32>* %dst.addr, <2 x i16> %src) nounwind {
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entry:
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%signext = sext <2 x i16> %src to <2 x i32> ; <<12 x i8>> [#uses=1]
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store <2 x i32> %signext, <2 x i32>* %dst.addr
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ret void
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}
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