Aaron Watry 41f3db569c R600/SI: Expand urem of v2i32/v4i32 for SI ...

Also add lit test for both cases on SI, and v2i32 for evergreen.

Note: I followed the guidance of the v4i32 EG check... UREM produces really
complex code, so let's just check that the instruction was lowered
successfully.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184844 91177308-0d34-0410-b5e6-96231b3b80d8

2013-06-25 13:55:46 +00:00

..

AArch64

AArch64: remove accidental test output file.

2013-06-18 21:16:53 +00:00

ARM

DebugInfo: Don't lose unreferenced non-trivial by-value parameters

2013-06-21 22:56:30 +00:00

CPP

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Generic

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Hexagon

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Inputs

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MBlaze

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Mips

Replace with a shorter test case produced by Doug Gillmore.

2013-06-22 19:35:08 +00:00

MSP430

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NVPTX

[NVPTX] Add support for selecting CUDA vs OCL mode based on triple

2013-06-21 18:51:49 +00:00

PowerPC

[PowerPC] Disable fast-isel for existing -O0 tests for PowerPC.

2013-06-13 20:23:34 +00:00

R600

R600/SI: Expand urem of v2i32/v4i32 for SI

2013-06-25 13:55:46 +00:00

SI

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SPARC

Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.

2013-06-17 19:00:36 +00:00

SystemZ

[SystemZ] Don't use LOAD and STORE REVERSED for volatile accesses

2013-05-31 13:25:22 +00:00

Thumb

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Thumb2

Cortex-R5 can issue Thumb2 integer division instructions.

2013-06-04 22:52:09 +00:00

X86

Revert "Temporarily enable MI-Sched on X86."

2013-06-25 02:48:58 +00:00

XCore

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