llvm-6502/test/CodeGen/ARM64/fp-imm.ll
Chandler Carruth 2530cd31f4 [ARM64] Fix materialization of an fp128 zero immediate. There currently
is not a pattern to lower this with clever instructions that zero the
register, so restrict the zero immediate legality special case to f64
and f32 (the only two sizes which fmov seems to directly support). Fixes
backend errors when building code such as libxml.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205161 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-31 00:02:10 +00:00

33 lines
772 B
LLVM

; RUN: llc < %s -mtriple=arm64-apple-darwin | FileCheck %s
; CHECK: literal8
; CHECK: .quad 4614256656552045848
define double @foo() {
; CHECK: _foo:
; CHECK: adrp x[[REG:[0-9]+]], lCPI0_0@PAGE
; CHECK: ldr d0, [x[[REG]], lCPI0_0@PAGEOFF]
; CHECK-NEXT: ret
ret double 0x400921FB54442D18
}
; CHECK: literal4
; CHECK: .long 1078530011
define float @bar() {
; CHECK: _bar:
; CHECK: adrp x[[REG:[0-9]+]], lCPI1_0@PAGE
; CHECK: ldr s0, [x[[REG]], lCPI1_0@PAGEOFF]
; CHECK-NEXT: ret
ret float 0x400921FB60000000
}
; CHECK: literal16
; CHECK: .quad 0
; CHECK: .quad 0
define fp128 @baz() {
; CHECK: _baz:
; CHECK: adrp x[[REG:[0-9]+]], lCPI2_0@PAGE
; CHECK: ldr q0, [x[[REG]], lCPI2_0@PAGEOFF]
; CHECK-NEXT: ret
ret fp128 0xL00000000000000000000000000000000
}