llvm-6502/lib/CodeGen
Nate Begeman 7042f15bde Teach the SelectionDAG how to transform select_cc eq, X, 0, 1, 0 into
either seteq X, 0 or srl (ctlz X), size(X-1), depending on what's legal
for the target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22978 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 05:41:12 +00:00
..
SelectionDAG Teach the SelectionDAG how to transform select_cc eq, X, 0, 1, 0 into 2005-08-23 05:41:12 +00:00
AsmPrinter.cpp Culling out use of unions for converting FP to bits and vice versa. 2005-08-17 19:34:49 +00:00
BranchFolding.cpp
ELFWriter.cpp Fix VC++ constant truncation warning. 2005-08-19 16:19:21 +00:00
IntrinsicLowering.cpp
LiveInterval.cpp
LiveInterval.h
LiveIntervalAnalysis.cpp Fix debug info to not print out recently freed memory. 2005-07-27 23:11:25 +00:00
LiveIntervalAnalysis.h
LiveVariables.cpp
MachineBasicBlock.cpp
MachineCodeEmitter.cpp new is not a valid default anywhere, so make this pure virtual 2005-07-28 18:13:59 +00:00
MachineFunction.cpp
MachineInstr.cpp
Makefile
Passes.cpp
PHIElimination.cpp
PhysRegTracker.h
PrologEpilogInserter.cpp
RegAllocIterativeScan.cpp
RegAllocLinearScan.cpp Try to avoid scanning the fixed list. On architectures with a non-stupid 2005-08-22 20:59:30 +00:00
RegAllocLocal.cpp
RegAllocSimple.cpp
TwoAddressInstructionPass.cpp
UnreachableBlockElim.cpp
VirtRegMap.cpp
VirtRegMap.h