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439661395f
(including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
1.8 KiB
C++
52 lines
1.8 KiB
C++
//===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "Alpha.h"
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#include "AlphaTargetMachine.h"
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#include "llvm/PassManager.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Target/TargetRegistry.h"
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using namespace llvm;
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extern "C" void LLVMInitializeAlphaTarget() {
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// Register the target.
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RegisterTargetMachine<AlphaTargetMachine> X(TheAlphaTarget);
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}
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AlphaTargetMachine::AlphaTargetMachine(const Target &T, StringRef TT,
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StringRef CPU,
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StringRef FS, Reloc::Model RM)
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: LLVMTargetMachine(T, TT, CPU, FS, RM),
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DataLayout("e-f128:128:128-n64"),
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FrameLowering(Subtarget),
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Subtarget(TT, CPU, FS),
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TLInfo(*this),
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TSInfo(*this) {
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}
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//===----------------------------------------------------------------------===//
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// Pass Pipeline Configuration
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//===----------------------------------------------------------------------===//
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bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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PM.add(createAlphaISelDag(*this));
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return false;
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}
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bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// Must run branch selection immediately preceding the asm printer
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PM.add(createAlphaBranchSelectionPass());
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PM.add(createAlphaLLRPPass(*this));
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return false;
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}
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