llvm-6502/test/CodeGen
Stepan Dyatkovskiy 46abfcf418 For ARM backend, fixed "byval" attribute support.
Now even the small structures could be passed within byval (small enough
to be stored in GPRs).
In regression tests next function prototypes are checked:

PR15293:
  %artz = type { i32 }
  define void @foo(%artz* byval %s)
  define void @foo2(%artz* byval %s, i32 %p, %artz* byval %s2)
foo: "s" stored in R0
foo2: "s" stored in R0, "s2" stored in R2.

Next AAPCS rules are checked:
5.5 Parameters Passing, C.4 and C.5,
"ParamSize" is parameter size in 32bit words:
-- NSAA != 0, NCRN < R4 and NCRN+ParamSize > R4.
   Parameter should be sent to the stack; NCRN := R4.
-- NSAA != 0, and NCRN < R4, NCRN+ParamSize < R4.
   Parameter stored in GPRs; NCRN += ParamSize.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181148 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-05 07:48:36 +00:00
..
AArch64 AArch64: support literal pool access in large memory model. 2013-05-04 16:54:07 +00:00
ARM For ARM backend, fixed "byval" attribute support. 2013-05-05 07:48:36 +00:00
CPP
Generic TBAA: remove !tbaa from testing cases if not used. 2013-04-30 17:52:57 +00:00
Hexagon Hexagon - Add peephole optimizations for zero extends. 2013-05-02 20:22:51 +00:00
Inputs
MBlaze
Mips Remove some uneeded pseudos in the presence of the naked function attribute. 2013-05-03 23:17:24 +00:00
MSP430
NVPTX
PowerPC LocalStackSlotAllocation improvements 2013-04-30 20:04:37 +00:00
R600 R600: Expand vector or, shl, srl, and xor nodes 2013-05-03 17:21:31 +00:00
SI
SPARC
Thumb LocalStackSlotAllocation improvements 2013-04-30 20:04:37 +00:00
Thumb2 TBAA: remove !tbaa from testing cases if not used. 2013-04-30 17:52:57 +00:00
X86 Remove a recently redundant transform from X86ISelLowering. 2013-05-05 02:00:10 +00:00
XCore