Nate Begeman e0c83a86b0 Better codegen of binary integer ops with 32 bit immediate operands. ... This transformation fires a few dozen times across the testsuite. For example, int test2(int X) { return X ^ 0x0FF00FF0; } Old: _test2: lis r2, 4080 ori r2, r2, 4080 xor r3, r3, r2 blr New: _test2: xoris r3, r3, 4080 xori r3, r3, 4080 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17004 91177308-0d34-0410-b5e6-96231b3b80d8		2004-10-15 00:50:19 +00:00
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CBackend	Update to reflect changes in Makefile rules.	2004-10-13 11:46:52 +00:00
PowerPC	Better codegen of binary integer ops with 32 bit immediate operands.	2004-10-15 00:50:19 +00:00
Skeleton	Update to reflect changes in Makefile rules.	2004-10-13 11:46:52 +00:00
Sparc	The field is called imm22', not simply imm'	2004-10-14 22:33:32 +00:00
SparcV8	The field is called imm22', not simply imm'	2004-10-14 22:33:32 +00:00
SparcV9	Checking in code that works on my simple test case. However, there is still a bug with branches that I need to fix.	2004-10-14 06:04:28 +00:00
X86	Update to reflect changes in Makefile rules.	2004-10-13 11:46:52 +00:00
Makefile	Targets are independent of each other, so compile them in parallel	2004-09-15 01:34:25 +00:00
Makefile.am	Update to reflect changes in Makefile rules.	2004-10-13 11:46:52 +00:00
MRegisterInfo.cpp	Add getAllocatableSet() function.	2004-08-26 22:21:04 +00:00
Target.td	Add isLittleEndianEncoding to InstrInfo class, defaults to `off'	2004-10-14 05:53:40 +00:00
TargetData.cpp	Changes For Bug 352	2004-09-01 22:55:40 +00:00
TargetFrameInfo.cpp	Remove dead methods	2004-08-12 18:37:15 +00:00
TargetInstrInfo.cpp	ConstantTypeMustBeLoaded has been incorporated into SparcV9PreSelection, its	2004-07-27 21:43:38 +00:00
TargetMachine.cpp	Changes For Bug 352	2004-09-01 22:55:40 +00:00
TargetMachineRegistry.cpp	Implement TargetRegistrationListener	2004-07-11 06:03:21 +00:00
TargetSchedInfo.cpp	Since we use alloca now make sure we include the proper headers for it.	2004-09-28 02:53:15 +00:00