6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-25 03:30:37 +00:00
Code Issues Projects Releases Wiki Activity
llvm-6502/include/llvm/Target
History
Anton Korobeynikov 25efd6d556 Use TARGET2 relocation for TType references on ARM. 
Do some cleanup of the code while here.

Inspired by patch by Logan Chien!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 01:47:00 +00:00
..
Mangler.h
whitespace
2012-10-09 01:56:07 +00:00
Target.td
add TableGen support to create relationship maps between instructions
2012-10-25 15:54:06 +00:00
TargetCallingConv.h
OutputArg: added an index of the original argument to match the change to
2012-11-01 23:49:58 +00:00
TargetCallingConv.td
Add TableGen support for callee saved registers.
2012-01-17 22:46:58 +00:00
TargetFrameLowering.h
Prune some includes and forward declarations.
2012-03-25 18:09:44 +00:00
TargetInstrInfo.h
misched: rename interfaceto avoid gcc warnings
2012-11-12 21:28:10 +00:00
TargetIntrinsicInfo.h
Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.
2012-09-17 06:59:23 +00:00
TargetItinerary.td
I'm introducing a new machine model to simultaneously allow simple
2012-07-07 04:00:00 +00:00
TargetJITInfo.h
Prune some includes and forward declarations.
2012-03-25 18:09:44 +00:00
TargetLibraryInfo.h
Add more functions to the target library information.
2012-11-10 03:11:06 +00:00
TargetLowering.h
PR14256: SelectionDAGLowering was renamed to SelectionDAGBuilder a long time ago. Fix references to it in documentation and comments.
2012-11-05 02:59:23 +00:00
TargetLoweringObjectFile.h
Use TARGET2 relocation for TType references on ARM.
2012-11-14 01:47:00 +00:00
TargetMachine.h
Remove TargetELFWriterInfo.
2012-10-28 21:34:43 +00:00
TargetOpcodes.h
Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be
2012-09-06 09:17:37 +00:00
TargetOptions.h
Revert r167620; this can be implemented using an existing CL option.
2012-11-09 18:25:27 +00:00
TargetRegisterInfo.h
Generate a table-driven version of TRI::composeSubRegIndices().
2012-11-01 00:32:10 +00:00
TargetSchedule.td
Added instregex support to TableGen subtarget emitter.
2012-10-03 23:06:32 +00:00
TargetSelectionDAG.td
Remove extra MayLoad/MayStore flags from atomic_load/store.
2012-08-28 03:11:32 +00:00
TargetSelectionDAGInfo.h
Move TargetData to DataLayout.
2012-10-08 16:38:25 +00:00
TargetSubtargetInfo.h
misched: Allow subtargets to enable misched and dependent options.
2012-11-13 08:47:29 +00:00
TargetTransformImpl.h
Refactor the getTypeLegalizationCost interface. No functionality change.
2012-11-05 23:57:45 +00:00