Jim Grosbach 65b7f3af76 Improve handling of immediates by splitting 32-bit immediates into two 16-bit ... immediate operands when they will fit into the using instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84778 91177308-0d34-0410-b5e6-96231b3b80d8		2009-10-21 20:44:34 +00:00
..
Alpha
ARM	Match more patterns to movt.	2009-10-21 08:15:52 +00:00
Blackfin	Move Blackfin intrinsics into the Target/Blackfin directory.	2009-10-15 18:50:52 +00:00
CBackend
CellSPU	Teach lit that the .c files in 'test/CodeGen/CellSPU/useful-harnesses' aren't tests.	2009-10-19 03:53:55 +00:00
CPP
Generic
Mips
MSP430	Add DAG printing for RMW stuff debugging	2009-10-21 19:18:28 +00:00
PIC16	Re-apply 84180 with the fixed test case.	2009-10-15 19:26:25 +00:00
PowerPC
SPARC
SystemZ
Thumb	Enable allocation of R3 in Thumb1	2009-10-19 22:57:03 +00:00
Thumb2	Improve handling of immediates by splitting 32-bit immediates into two 16-bit	2009-10-21 20:44:34 +00:00
X86	Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail.	2009-10-21 01:44:44 +00:00
XCore