Dan Gohman 7b8e96401c When doing the very-late shift-and address-mode optimization, ... create a new DAG node to represent the new shift to keep the DAG consistent, even though it'll almost always be folded into the address. If a user of the resulting address has multiple uses, the nodes may get revisited by a later MatchAddress call, in which case DAG inconsistencies do matter. This fixes PR2849. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57465 91177308-0d34-0410-b5e6-96231b3b80d8		2008-10-13 20:52:04 +00:00
..
Alpha	get CodeGen/Alpha/mul128.ll to work.	2008-10-09 04:50:56 +00:00
ARM
CBackend
CellSPU
CPP
Generic	This does not fail anymore	2008-10-10 20:28:32 +00:00
IA64
Mips	FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington.	2008-10-13 18:46:18 +00:00
PowerPC
SPARC	Add testcase for 'r' inline asm operand	2008-10-10 20:28:59 +00:00
X86	When doing the very-late shift-and address-mode optimization,	2008-10-13 20:52:04 +00:00