Andrew Lenharth 49c709f891 cycle counter fix ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24573 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-02 04:56:24 +00:00
..
DAGCombiner.cpp
LegalizeDAG.cpp	cycle counter fix	2005-12-02 04:56:24 +00:00
Makefile
ScheduleDAG.cpp	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
SelectionDAG.cpp	Don't remove two operand, two result nodes from the binary ops map. These	2005-12-01 23:14:50 +00:00
SelectionDAGISel.cpp	First chunk of actually generating vector code for packed types. These	2005-11-30 08:22:07 +00:00
SelectionDAGPrinter.cpp	Added an index field to GlobalAddressSDNode so it can represent X+12, etc.	2005-11-30 02:04:11 +00:00
TargetLowering.cpp	Add the majority of the vector machien value types we expect to support,	2005-11-29 05:45:29 +00:00